Blog Review: July 1

30 years of EDA; growing longevity of mature nodes; choosing DDR4 write CRC; new security challenge; touching holograms; SoC design challenges.


On the eve of his retirement, Cadence’s Richard Goering takes a look back at 30 years of covering EDA: the highlights, the lowlights, and the headlights shining into the future.

Established nodes are experiencing a much higher demand than one might normally expect at this point in their lifecycle. Mentor’s Michael White examines the dynamics and market forces behind the longevity, and the challenges that come with it.

Do you need DDR4 write CRC beyond a certain frequency? The answer is complex, so Synopsys’ Marc Greenberg composed a flowchart to help determine if it’s worth it.

Rambus’ Aharon Etengoff investigates how researchers from Tel Aviv University, using inexpensive and readily available equipment, were able to extract secret decryption keys from laptop computers from a distance of 50 centimeters and a total duration of just a few seconds.

Holograms you can touch. A newly discovered planet disguised by comet camouflage. This week, Ansys’ Bill Vandermark picks five engineering technology articles with a vast reach and range, from a tiny speck on the tip of your finger to the outer reaches of our known galaxy.

A DAC panel discusses some of the challenges related to SoC design, including the fact that SoCs are increasing in size and complexity, as well as the rise in modular subsystems and virtualization, in a video presented by ARM’s Eoin McCann.

Plus, check out the blogs featured in last week’s System-Level Design newsletter:

Editor In Chief Ed Sperling points out why one M&A deal in particular is worth watching with a powerful magnifying glass.

Technology Editor Brian Bailey finds several programs in the military and commercial worlds aimed at stamping out counterfeiting.

Mentor’s Mathew Clark contends that current methodologies are inadequate to address increasingly complex thermal issues.

Cadence’s Frank Schirrmeister argues that having real comparisons for verification engines will go a long way in allowing chipmakers to understand what they’re buying and why.

Synopsys’ Tom De Schutter observes that early software development is now being used to accelerate hardware verification and hardware-software integration.

eSilicon’s Jens Andersen looks at why analytics are critical to the future of semiconductor design.

Arteris’ Kurt Shuler notes that it’s easier today than ever before to design a chip that cannot be manufactured.

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