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Blog Review: July 7

PIPE SerDes architecture; checking values in SystemVerilog; aftermarket security risks.

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Cadence’s Sangeeta Soni provides a primer on the PIPE SerDes architecture and some of the changes that can introduce verification challenges for SerDes compliant PHY and MAC devices.

Siemens EDA’s Chris Spear demystifies the $cast() method in SystemVerilog, which checks values at runtime rather than compile time, and gives some examples of when it is useful.

Synopsys’ Chris Clark warns that incorporating aftermarket devices into a vehicle could open the door to security vulnerabilities and argues that OEMs should work with device developers to encourage security-focused design processes.

Arm’s Charles García-Tobin introduces the company’s new Confidential Compute Architecture in Armv9-A, how it changes the architecture, and how Realms are used to protect sensitive workloads from access by supervisory software.

Ansys’ Susan Coleman checks out how CFD was used to model not just the heart but also its contraction, relaxation, and dynamics of moving blood in conjunction with a mechanical heart valve to aid in determining better treatments for cardiovascular issues.

SEMI’s Michael Hall takes a look at the current state of the COVID-19 pandemic around the world, consumer spending, and the need for more long-term strategic planning.

Nvidia’s Scott Martin introduces a software development kit to speed up quantum circuit simulations running on GPUs and looks at how it’s being used.

And don’t miss the blogs featured in the latest Automotive, Security & Pervasive Computing and Test, Measurement & Analytics newsletters:

Arteris IP’s Vincent Thibaut lays out the benefits of providing collaborating teams a single and reliable source of truth for the design.

Flex Logix’s Vinay Mehta points to common pitfalls in training and deploying CNN solutions, and explains how to avoid them.

Siemens EDA’s Sumit Vishwakarma warns that while real-number modeling enables earlier verification of analog and mixed-signal designs, improper use can lead to trouble.

Synopsys’ Meirav Nitzan describes how to see the effect of safety mechanisms on FMEDA early in the design process.

Cadence’s Sriram Sharma Kalluri explains why protecting offload engines requires both software and hardware solutions.

Siemens EDA’s Geir Eide demonstrates effective and tunable bus-based scan data distribution.

Onto Innovation’s Mike McIntyre explains how to use yield analytics and consolidated data to power an multi-chip module factory.

Advantest’s Alan Hart urges removing the need to manually review anomalous data points by automatically triggering retest actions.



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