Blog Review: June 18

HBM compatibility vs. customizability; 3D-IC marks shift for EDA; AI ToF decoding; AI-defined vehicles; genAI in EDA.

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Synopsys’ John Koeter and other industry experts discuss whether high-bandwidth memory should follow established standards for broad compatibility and scalability or be customized to address specific use case requirements and time-to-market targets.

In a podcast, Siemens’ Conor Peick, Dale Tutt, and Mike Ellow chat about how progress in 3D-IC development, thermal management, and the industrial metaverse marks a paradigm shift for EDA and other engineering software tools.

Cadence’s Sriram Sharma Kalluri examines how AI is being utilized for time-of-flight decoding and the shift in computational requirements from traditional signal processing to neural network-based approaches.

Arm’s Suraj Gajendra looks to a future where AI-defined vehicles will have AI integrated into every aspect of the vehicle’s functionality to provide conversational human to vehicle interactions, autonomy, and high levels of personalization.

Keysight’s Richard Duvall explores the basics of superconducting qubits and the EDA technologies being used to design quantum systems.

Ansys’ Susan Coleman and Caty Fairclough check out a project at the University of Toronto that is using small CubeSats equipped with hyperspectral cameras to improve agricultural planning by mapping crop residue from low Earth orbit.

The ESD Alliance’s Bob Smith chats with Silimate’s Ann Wu and Verific’s Rick Carlson about using generative AI and LLMs in EDA and how startups are working to convince designers of the potential.

Plus, don’t miss the blogs featured in the latest Automotive, Security & Pervasive Computing, Test, Measurement & Analytics, and Low Power-High Performance newsletters:

Rambus’ Bart Stevens examines the benefits of tailoring security subsystems to unique application requirements.

Infineon’s Fanni Vikor explores a secure and interoperable framework for electronic identification and trust services.

Synopsys’ Dana Neustadter shows how to keep vehicle data secure and tamper-proof even if physical access is gained.

Synaptics’ Todd Dust digs into context-aware computing, enabling ultra-low-power operation while maintaining high-performance AI capabilities.

Siemens’ Jake Wiltgen highlights a holistic approach for addressing both systematic and random failures in electronic systems.

Cadence’s Robert Schweiger explains why virtual prototyping enables earlier automotive software validation.

Onto Innovation’s Cheolkyu Kim finds sub-10μm metrology is now required for RDL and bond pads.

Siemens’ Ashrith Harith shows why pseudo-random testing patterns are inadequate for meeting the stringent requirements of automotive electronics.

PDF Solutions’ Christophe Begue contends that early engagement and integrated analytics will be critical for success in future semiconductor development.

Synopsys’ Pawini Mahajan digs into the testability analysis required by ISO 26262.

proteanTecs’ Alex Burlak notes that machine learning can identify early indicators of risk by analyzing timing margin data from within the chip.

Advantest’s Roberto Colecchia examines data feed forward and its role in real-time test optimization.

Quadric’s Steve Roddy predicts that the IP industry, which is no stranger to boom and bust cycles, is at the crest of another wave.

Synopsys’ Frank Malloy talks about taming multi-die design complexity and how it will require broad industry collaboration and an evolution of skillsets.

Fraunhofer’s Roland Jancke explains why addressing complex design issues early in the flow can save time and improve quality.

Siemens’ Harry Foster outlines how integrated workflows provide a clearer path from RTL to full-system coverage.

Rambus’ Carlos Weissenberg analyzes new memory module form factors and how interface technologies will meet the demands of AI PCs.

Arm’s Christoffer Dall offers an interrupt management solution for ensuring the right processor handles the right task at the right time.

Ansys’ Jennifer Procario considers leveraging reduced-order models to enhance digital twins and AI/ML training.

Cadence’s Robbie O’Sullivan highlights real world verification challenges and solutions, such as incremental elaboration.



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