Blog Review: June 5

Cadence’s Neelabh Singh provides an overview of the low power entry and exit flows in USB4 Version 2.0 link speed and how they have been simplified by making low power entry uni-directional and removing the need for certain handshakes for low power exit of the re-timers.

In a podcast, Siemens’ Steph Chavez chats with Daniel Beeker of NXP about the foundational importance of power distribution in electronic design, common challenges and pitfalls, and practical strategies for ensuring stable and efficient power delivery.

Synopsys’ Richard LC Hu and Yijun (Joy) Ding combine a ray-based automatic design tool with a wave-based inverse design tool to design an ultra-wide angle metalens imaging system.

Keysight’s Emily Yan provides an introduction to semiconductor IP, including a brief history, hard versus soft IP, key functionalities, development methodologies, reuse, and IP management strategies.

Infineon’s Paul Wiener finds that for data center servers, the combination of cold-plate liquid cooling and GaN-based AC-DC power supplies results in lower operating temperatures and higher performance compared to SiC, with lower losses connected to switching speeds and parasitic capacitance.

Ansys’ Antoine Reverberi checks out how AI technologies integrate with and extend upon numerical simulations and solvers to boost model performance and enhance traditional simulation without compromising accuracy for speed.

Arm’s Tamar Christina details improvements in the new GCC 14 release brought by tackling technical debt in the compiler, including auto-vectorization improvements like refactor peeling and loop shape rejection along with a new AArch64 pass.

SEMI’s Ajit Manocha finds that the global semiconductor industry is expanding production capacity with 103 new fabs expected to come online between 2023 and 2027, but warns that while the fab boom could help diversify the global supply chain, it also threatens to widen the industry’s talent gap and slow its sustainability progress.

Plus, don’t miss the blogs featured in the latest Systems & Design newsletter:

Technology Editor Brian Bailey casts doubt on the notion that EDA has a closed mindset and is playing catchup to disruptive technologies.

Expedera’s Ben Gomes digs into LLMs and their importance to the vision domain due to their flexibility in handling different inputs and their strength at interpreting meaning in images.

Arteris’ John Min outlines a way to utilize caches to maximize performance in lower-cost, earlier generation, mid-range processor and accelerator cores.

Siemens EDA’s Terry Meeks shows how to find and fix soft connectivity issues between diffusion layers and well regions to ensure power and ground nets are correctly connected.

Cadence’s Reela Samuel shows how machine learning algorithms can pave an efficient path through design complexities.

Keysight’s Allison Freedman talks about the crucial role of testing in ensuring the seamless integration of satellite services into cellular networks.

Synopsys’ Rob van Blommestein explains how AI tools can reduce design turn-around time, improve power consumption, and minimize timing requirement violations.