Blog Review: Nov. 20

Siemens’ Jonathan Muirhead explains why matching and symmetry are so important for analog and RF circuits, especially in topological structures like differential pairs and current mirrors, and introduces checking techniques to ensure compliance.

Cadence’s Satish Kumar Padhi examines the significance of randomization in PCIe IDE verification, focusing on how it ensures data integrity and encryption reliability while highlighting the unique challenges it presents.

Synopsys’ Dana Neustadter, Sara Zafar Jafarzadeh, and Vincent van der Leest discuss why quantum computing is expected to have such a big impact on encryption and look to recent developments in quantum-resistant cryptographic algorithms and what lies ahead for additional standards.

Ansys’ Rémy Fernandes shows how automation can revolutionize the signal integrity and power integrity workflow with Python-based libraries like PyAEDT that ensure that established processes, such as importing designs, preprocessing, meshing, solver setup, and post-processing, are followed consistently and correctly.

Keysight’s Nancy Friedrich checks out software-defined satellites and how they leverage advances in software-defined radio techniques to enable operators to re-allocate or reconfigure a satellite for different tasks, regions, users, and more.

Arm’s Dong Wei introduces a compliance program that ensures OS interoperability on Arm-based hardware by incorporating the needs of target software into silicon design so an OS can be built once and deployed on any compliant chip regardless of manufacturer.

SEMI’s Sitong He chats with Simone Ferri of STMicroelectronics about current trends, recent technological innovations, and challenges in the MEMS and imaging sensors market.

Plus, check out the blogs featured in the latest Automotive, Security & Pervasive Computing, Test, Measurement & Analytics, and Low Power-High Performance newsletters:

Technology Editor Brian Bailey contends that EDA startups of the future will look very different because they don’t have a choice.

Siemens’ John Ferguson looks at managing thermal, mechanical, and electrical challenges in modern cars that have up to 3,000 chips.

Rambus’ Maxim Demchenko explains how a combination of data integrity checks and encryption can safeguard transmitted data.

Infineon’s Montassar Ben Romdhane explores challenges with passive infrared sensors in various use cases, and the need to weigh critical features against cost.

Synopsys’ Dana Neustadter outlines the benefits of PCIe 5.0, including safety mechanisms, documentation, and deliverables for ISO/SAE 21434.

Cadence’s Vinod Khera contends that the future of hearing aids lies in further miniaturization and functionality enhancement, with high memory and low power in a user-friendly design.

Onto Innovation’s Sean King contends that creating a successful digital twin relies on asking the right questions and knowing what problem you’re trying to solve.

proteanTecs’ Eyal Fayneh explores workload- and reliability-aware adaptive voltage scaling that is safer than traditional methods, enabling fewer guard-bands.

Synopsys’ Hari Mani explains how to ensure that test patterns do not place the SoC in danger of thermal runaway and damage.

PDF Solutions’ John Kibarian digs into the best applications for AI/ML, such as identifying anomalies in the vast amounts of data generated by fabs.

Bruker’s Inga Koehler warns that counterfeiters are using more advanced blacktopping techniques to evade solvent-based detection methods.

Teradyne’s Jeorge Hurtarte looks at the benefits of SiC and GaN, and why these compound semiconductors require new testing approaches.

Advantest’s Keith Schaub extols the advantages of integrating data sources across the entire IC manufacturing supply chain, including better yield and quality.

Rambus’ Zaman Mollah introduces Multiplexed Registered DIMMs, a new memory module architecture that expands the capabilities of server main memory.

Siemens’ Ujjwal Negi and Prashant Dixit dig into computational storage devices and how to address NVMe verification challenges.

Expedera’s Paul Karazuba finds that small language models provide an option for when cost, efficiency, speed, and ease of deployment are prioritized.

Quadric’s Steve Roddy advises to ensure an NPU vendor is reporting benchmarks in a way that matches your system needs.

Cadence’s Nayan Gaywala shows how to create a multi-core simulation that functions as a practical software development platform.

Arm community blogger Jonathan Pallant explains how the Rust programming language enables development of rich APIs to describe various hardware interfaces.

Ansys’ Wim Slagter offers guidance for choosing the best CPU to run simulation software, considering factors such as speed, scalability, and performance for large, complex models.