Blog Review: Oct. 12

CXL updates benefit data-driven applications; debugging testbenches; USB4 and Thunderbolt; low-cost smartphones.


Synopsys’ Richard Solomon, Madhumita Sanyal, and Gary Ruggles take a look at the possibilities that CXL 3.0 can bring to a variety of data-driven applications that demand increasingly higher levels of memory capacity, with higher bandwidth, more security, and lower latency.

Siemens EDA’s Rich Edelman provides some tips for debugging UVM testbenches, such as how to determine what line changed a particular variable and a way to determine who made a derived class.

Cadence’s Anshul Shah points to a few of the main features in USB4 interoperability with Thunderbolt 3, including bi-directional pins and asymmetric negotiation.

Arm’s Neil Fletcher explores the potential of ultra-low cost smartphones to help bridge the digital divide in emerging economies.

Ansys’ Andy Byers checks out a collaboration with Microsoft to accurately simulate the electrical properties of full RFIC designs in a reasonable timeframe.

SEMI’s Gity Samadi and Paul Semenza check out how novel interconnect and attach techniques in advanced packaging to enable more compact, lightweight, and higher-performance flexible hybrid electronics.

And don’t miss blogs featured in the latest Auto, Security & Pervasive Computing and Test, Measurement & Analytics newsletters:

Rambus’ Danny Moore examines new CXL use models and increased flexibility in data center architectures.

Riscure’s Jasmina Omic explains how to determine robustness of DRM and content protection strategies.

Cadence’s Steve Brown looks at the evolution of electric systems in race cars.

MathWorks’ Eric Cigan and Siemens EDA’s Jacob Wiltgen lay out a flight path to enable conceptual design exploration and verification for airborne electronic hardware.

Arteris IP’s Frank Schirrmeister digs into how to deliver best-in-class automotive solutions.

Flex Logix’s Andy Jaros describes using embedded FPGAs in low-power applications.

Industry analyst Anand Joshi looks at how to optimize performance and maximize ROI in new designs.

Onto Innovation’s John Chang, with Corey Shay, James Webb, and Timothy Chang, explain how to increase throughput by eliminating the need for stitching.

Synopsys’ Dana Neustadter advises that security should be seen as an integral part of design architecture, not an afterthought.

Teradyne’s David Vondran looks at production-level test for next-generation wireless technologies.

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