Blog Review: Oct. 3

Applied’s Buvna Ayyagari-Sangamalli notes that the requirements of AI are challenging the entire design ecosystem, and while new materials are necessary, so is keeping up the current pace of architecture and EDA development.

Mentor’s Joe Hupcey III digs into how to handle counters effectively with formal by reducing their size or replacing them with abstract models to allow formal engines to reach interesting design states faster.

Cadence’s Meera Collier points to a new medical diagnostic device from the University of Glasgow that pairs a handheld sensor with a smartphone app to measure the levels of various metabolites in fluid samples from patients.

Synopsys’ Taylor Armerding provides a rundown of the latest Facebook breach and what’s known about the vulnerabilities that enabled it.

TechSearch’s E. Jan Vardaman and SEMI’s Clark Tseng take a look at what’s changing for OSATs and whether they can reach into new markets like connectivity and automotive to continue strong growth.

UltraSoC’s Aileen Smith argues for the use of hardware-based security to create more sophisticated trust models that go beyond simply holding keys for secure areas by observing behavior over time.

ANSYS’ Shawn Wasserman argues that simulated clinical trials can push faster, more affordable, and potentially individualized medical treatments onto the market.

Arm’s Jack Melling lists a wide range of ways machine learning technologies are already incorporated into everyday life.

A Rambus writer notes that a Japanese cryptocurrency exchange is the latest victim in a series of digital heists, losing about $60 million in various currencies.

For more good reading, check out the blogs highlighted in last week’s System-Level Design newsletter:

Editor In Chief Ed Sperling finds general-purpose processors under pressure as demand for application-specific chips accelerates.

Technology Editor Brian Bailey questions how to balance risk in semiconductor design against the threat of commoditization.

Synopsys’ Taigon Song looks at what the latest transistor types will mean for IC designers.

Mentor’s Wei-Lii Tan explains why machine learning can improve the traditional process for verifying Liberty files.

OneSpin’s Sergio Marchese argues that formal verification of FPUs is no longer a prerogative of big companies spending big bucks.

Cadence’s Frank Schirrmeister contends that verifying AI behaves as intended will become an important safety issue.

Aldec’s Farhad Fallahlalehzari shows how to build an automotive vision monitoring system using FPGAs.

eSilicon’s Mike Gianfagna points to the first public demo of a new 56G SerDes IP block.