LLMs Show Promise In Secure IC Design


The introduction of large language models into the EDA flow could significantly reduce the time, effort, and cost of designing secure chips and systems, but they also could open the door to more sophisticated attacks. It's still early days for the use of LLMs in chip and system design. The technology is just beginning to be implemented, and there are numerous technical challenges that must b... » read more

Mini Review of Photodetectors and Image Sensors: Materials and Fabrication


A new technical paper titled "Image Sensors and Photodetectors Based on Low-Carbon Footprint Solution-Processed Semiconductors" was published by researchers at Cardiff University. Abstract "This mini-review explores the evolution of image sensors, essential electronic components increasingly integrated into daily life. Traditional manufacturing methods for image sensors and photodetectors, ... » read more

Chip Industry Week In Review


Arm joined forces with Korea's Samsung Foundry, ADTechnology, and Rebellions to create a CPU chiplet platform for AI training and inference. The new chiplet will be based on Samsung's 2nm gate-all-around technology. Intel and AMD, arch competitors for decades, formed an x86 ecosystem advisory group to collaborate on architectural interoperability and simplify software development. Samsung... » read more

Physics-Based Efficient Device Model for Fe-TFTs (Univ. of Florida)


A new technical paper titled "An efficient device model for ferroelectric thin-film transistors" was published by researchers at University of Florida. Abstract "Ferroelectric thin-film transistors (Fe-TFTs) have promising potential for flexible electronics, memory, and neuromorphic computing applications. Here, we report on a physics-based efficient device model for Fe-TFTs that effectivel... » read more

3D Device With BEOL-Compatible Channel And Physical Design for Efficient Double-Side Routing


A new technical paper titled "Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock" was published by researchers at Stanford University, Intel Corporation, and Carnegie Mellon University. Abstract "This paper presents Omni 3D - a 3D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D arbitrarily interleaves ... » read more

Distributed Radar Signal Processing Utilizing A Sparse Array To Obfuscate The Data


A new technical paper titled "Signal processing architecture for a trustworthy 77GHz MIMO Radar" was published by researchers at Fraunhofer FHR, Ruhr University Bochum, and Wavesense Dresden GmbH. Abstract "Radar systems are used in safety critical applications in vehicles, so it is necessary to ensure their functioning is reliable and trustworthy. System-on-chip (SoC) radars, which are com... » read more

3D-Printed Logic Gates and Resettable Fuses, Via Material Extrusion (MIT)


A new technical paper titled "Semiconductor-free, monolithically 3D-printed logic gates and resettable fuses" was published by researchers at MIT. "This work reports the first active electronics fully 3D-printed via material extrusion, i.e. one of the most accessible and versatile additive manufacturing processes. The technology is proof-of-concept demonstrated through the implementation of ... » read more

GPUs: Bandit Based Framework To Dynamically Reduce Energy Consumption


A new technical paper titled "Online Energy Optimization in GPUs: A Multi-Armed Bandit Approach" was published by researchers at Illinois Institute of Technology, Argonne National Lab and Emory University. Abstract "Energy consumption has become a critical design metric and a limiting factor in the development of future computing architectures, from small wearable devices to large-scale lea... » read more

Boost High-Performance IC Design Flows With Early Interactive Symmetry Checking


In the realm of high-performance IC (integrated circuit) design, symmetry is not just an aesthetic preference—it’s a critical factor for ensuring proper device functionality, especially in analog and RF designs. Achieving symmetry early in the design process helps to ensure consistent electrical behavior, which is essential for meeting performance goals and maintaining device reliability. H... » read more

In Memory, At Memory, Near Memory: What Would Goldilocks Choose?


The children’s fairy tale of ‘Goldilocks and the Three Bears’ describes the adventures of Goldi as she tries to choose among three choices for bedding, chairs, and bowls of porridge. One meal is “too hot,” the other “too cold,” and finally one is “just right.” If Goldi were faced with making architecture choices for AI processing in modern edge/device SoCs, she would also face... » read more

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