Cadence Gobbles Up Jasper

Analysis: Acquisition gives Cadence the most complete functional verification portfolio in the industry, and a complete high-level synthesis flow.


2012 was the year that everyone remembers Synopsys going on an acquisition binge, but 2014 will go down as the year that Cadence Design Systems decided that EDA was worth investing in. Rather than placing investment bets outside of its core competence, Cadence bought Forte in February and now adds Jasper Design Automation to its fold.

Jasper started life as Tempus Fugit in 1999 and became Jasper Design Automation in 2003 when tools became more important than consulting in the formal space and Kathryn Kranen became president and CEO. Since then, Jasper has been the premier player in the formal verification market, making all other players look like second-class citizens. Many had said that so much money had been invested in Jasper over the years that a buyout was unlikely, but Kranen and the investors always had faith that they would get the returns they expected. Today that belief turned into a reality when Cadence offered approximately $170 million in cash. Jasper had approximately $24 million of cash, cash equivalents and short-term investments as of December 31, 2013. That makes Jasper one of the highest valued companies in the EDA industry. Over the years, Jasper has received approximately $27M in funding, with the latest round being $2.13M in 2012.

Jasper has many firsts to its name, and where it was not the first it quickly came to dominate a field. Jasper also refused to cut sales price, instead believing that no company should be given a discounted price if it meant that other buyers had to subsidize the sale. That meant that Jasper always had the ability to fund the necessary AEs and to ensure that not only were their customers successful, but that formal continued to grow in acceptance. Today, many are asking the question: Is formal set to overtake simulation? Cadence clearly believes that being the number one in the formal technology space is a good survival skill.

In addition, the latest new app is JasperGold Sequential Equivalence Checking App. This new app enables designers to exhaustively verify the sequential functional equivalence of RTL implementations, ensuring that they function identically at sequential design points — and 10x faster than competing tools. This ties in nicely with Cadence’s Forte acquisition, because one of the technologies necessary to make high-level synthesis successful is sequential equivalence checking. Calypto is the only other company that has these two pieces in the same company, and because Calypto is majority owned by Mentor Graphics, this would potentially be a hole in the Cadence portfolio.

Formal is no stranger to Cadence. Back in 2003, Cadence acquired Verplex Systems, which was one of the leading formal players at the time. That purchase cost them $87.6M. While other large EDA players have struggled with their formal solutions, Cadence has continued to be a significant player in the market, although perhaps paling beside Jasper. However, Cadence does have some formal technology that Jasper lacks, principally in the area of semi-formal verification. Semiconductor Engineering asked Craig Cochran, vice president, corporate marketing at Cadence Design Systems, how they intended to integrate the development teams. “It is too early to comment on integration specifics yet,” said Cochran. “We have our own formal solutions which are quite popular and applied differently from the Jasper tools. There will be opportunities to leverage each other strengths. We want to use everyone’s talent to work out the best way to accomplish this. We also have to look at both the technology and the customers and work out what is best for everyone.”

“Jasper’s products are recognized as the technology leaders in formal analysis, targeting complex verification challenges and increasing overall verification productivity,” said Charlie Huang, senior vice president of the System & Verification Group and Worldwide Field Operations at Cadence. “Jasper’s formal analysis solutions are used by customers today alongside Cadence’s metric-driven verification flow to form a broad verification solution. We look forward to welcoming Jasper’s strong formal development expertise and skilled team to Cadence.”

“Jasper and Cadence serve top-tier customers that will benefit from expanded formal technology and a broader, tightly-integrated verification solution,” said Kathryn Kranen, president and CEO of Jasper. “The verification technologies, when combined, will benefit customers through a comprehensive metric-driven verification approach that unites formal and dynamic techniques, realizing the strength of each and leveraging the integration between them.” Kranen will be staying on at Cadence although it is not clear what her role will be yet.

“The apps model is likely to persist,” said Cochran. “Cadence also has verification apps. These, be they formal, simulation, emulation or prototyping, are built on a base capabilities platform and each app focuses on specific verification needs. Apps are intended to remove complexity from verification tasks.”

One thing is clear – Cadence now has the most comprehensive verification solution in the industry and will have a clear vision in areas such as attempting to bring formal and simulation technologies closer together. The industry has been looking for solutions in this area and attempting to create standards has not yielded the necessary results. Perhaps Cadence now can create solutions that work and will become the de-facto solutions for the industry.

“Jasper is highly used for doing embedded processor verification,” explains Cochran, “as are Cadence tools. For companies doing embedded processor types of design, which are the largest system, SoC and semiconductor companies, they will benefit from this joint solution. Several of those companies asked Cadence to add Jasper to their portfolio.”

They hope to close the acquisition before DAC.

Article updated from original posting after discussions with Criag Cochran.


DaveKelf says:

Nice write up on this latest acquisition, Brian. However, I
have to take issue with one comment you made. OneSpin has had a highly
effective Sequential RTL Checker as part of its Equivalency Checking (EC) technology
portfolio for sometime, both faster and more inclusive than Jasper’s. Additionally,
we have worked with a number of synthesis players who use our EC tools
internally and have gained a fair amount of expertize in this area, including
that of High Level Synthesis (HLS).

Understanding the sequential optimizations performed by these
synthesis tools is just one small part of the requirements for this space. HLS
optimizations are broad and varied and a full knowledge of the Equivalency
Checking space is a minimal requirement, an area that Jasper has not, to date,
included in its portfolio. This acquisition will not help the Cadence HLS flow,
and I don’t think it is expected to.

Brian Bailey says:

You are right that I was on the Jasper Technical Advisory Board. The last time we actually met was at DAC either 3 or 4 years ago.

[…] Cadence announced its intention to acquire Jasper Design Automation, adding formal technology to its roster of verification tools. The […]

[…] to Cadence senior VP Charlie Huang in Cadence’s System & Verification Group. The deal was first announced in […]

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