category: Blogs – MD

category: IoT, Security & Automotive

New Plasma Power Technologies For Next-Gen Semiconductor Manufacturing
By Vitaly Petrishchev - 21 Sep, 2023 - Comments: 0

As chip designs push the limits of speed, size and complexity, the semiconductor industry has set its sights on angstrom-scale device features. High-speed, precise and repeatable plasma power delivery with sophisticated controls is fundamental to process and device improvements. These factors support inflection points in technologies from chip-scale packaging through advanced front-end technolo... » read more

Enabling A Chiplet Supply Chain
By Vik Chaudhry - 17 Aug, 2023 - Comments: 0

Chiplets have been in the news quite a bit lately. A chiplet-based architecture offers several advantages that chip designers can benefit from as they bring out new products to the market. Over the years, system designers have integrated more and more functions into a system on chip (SoC). As a result, the size of SoCs keeps increasing. Even though SoCs provide several advantages in performance... » read more

FLEX 2023 Takeaways: Flexible And Printed Electronics Move Into Electronics Manufacturing
By Gity Samadi - 17 Aug, 2023 - Comments: 0

By Gity Samadi and Paul Semenza The FLEX Conference, held again this year in conjunction with SEMICON West 2023, provided numerous examples of continued developments in flexible, printed, and flexible hybrid electronics technologies applied to sensing, robotics, communications, and other applications. At the same time, there is growing focus on applying various additive manufacturing equipme... » read more

A Hybrid PLP Technology Based On A 650mm x 650mm Platform
By Eoin O'Toole - 25 Jul, 2023 - Comments: 0

A panel-level (PL) approach to fan-out (FO) packaging has been discussed for several years to reduce the cost of chip-first FO packaging based on redistribution layer (RDL) technology. More recently, multilayer high-density chip-last packages have been introduced for more advanced applications. This technology would also benefit from PL processing for cost reduction. Due to the large package di... » read more

Improving Gate All Around Transistor Performance Using Virtual Process Window Exploration
By Sumant Sarkar - 25 Jul, 2023 - Comments: 0

As transistor sizes shrink, short channel effects make it more difficult for transistor gates to turn a transistor ON and OFF [1]. One method to overcome this problem is to move away from planar transistor architectures toward 3D devices. Gate-all-around (GAA) architectures are an example of this type of 3D device [2]. In a GAA transistor, the gate oxide surrounds the channel in all directions.... » read more

Multi-Beam Writers Are Driving EUV Mask Development
By Jan Hendrik Peters - 25 Jul, 2023 - Comments: 1

By Jan Hendrik Peters (bmbg consult) and Ines Stolberg (Vistec Electron Beam) The European Mask and Lithography Conference (EMLC) 2023, held in Dresden this past June, was attended by about 180 people and over 60 talks and posters were presented. With several keynote and invited talks over two and a half days, the conference gave an overview of the semiconductor and technology landscape in E... » read more

Smarter Systems Through Heterogeneous Integration: Highlights From 3D & Systems Summit
By Cassandra Melvin - 25 Jul, 2023 - Comments: 0

It has taken decades of research and development and strong commitment to various industry programs, but the stars are finally aligning for 3D semiconductor systems. No one could have left the 3D & Systems Summit 2023 – held in late June in Dresden – with any doubt that heterogeneous integration, enabled by increasingly mature 3D packaging technologies, is becoming a key driver of the s... » read more

High-Density Fan-Out Packaging With Fine Pitch Embedded Trace RDL
By WonChul Do - 15 Jun, 2023 - Comments: 0

The needs of high-performance devices for artificial intelligence (AI), high performance computing (HPC) and data center applications have drastically accelerated during the Covid-19 pandemic period. At the same time, the integrated circuit (IC) industry struggles to minimize the silicon technology node to satisfy the endless requirements of computing performance within tight cost constraints. ... » read more

Improving DRAM Device Performance Through Saddle Fin Process Optimization
By Taeyon (TY) Oh - 15 Jun, 2023 - Comments: 0

As DRAM technology nodes have scaled down, access transistor issues have been highlighted due to weak gate controllability. Saddle Fins with Buried Channel Array Transistors (BCAT) have subsequently been introduced to increase channel length, prevent short channel effects, and increase data retention times [1]. However, at technology nodes beyond 20nm, securing sufficient device performance (su... » read more

A Technical Guide To Selecting A Photosensitive Permanent Bonding Material
By Jessica Albright - 15 Jun, 2023 - Comments: 0

A photosensitive permanent bonding material enables the creation of high-quality permanent bonds between dissimilar materials used in the creation of MEMS and sensors. Having a thorough understanding of the materials and product performance is crucial to the success of the end application. In this article, we explore nine criteria used to evaluate a polymeric photosensitive permanent bonding ma... » read more

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