Blog Review: May 14


Siemens’ Stephen V. Chavez finds that proper PCB high voltage spacing between conductive elements is key to reliability and understanding the principles of clearance (through-air spacing) and creepage (along-surface spacing) is critical. Cadence’s Frank Ferro checks out how the new HBM4 standard boosts bandwidth and addresses key issues in the data center, including the growing size of L... » read more

Chip Industry Week in Review


Check out the Inside Chips podcast for our behind-the-scenes analysis. The U.S. government is rescinding a Biden-era AI export rule that would have imposed complex restrictions on how U.S. chip and AI technology is sold abroad, a move welcomed by companies like Nvidia, reports Bloomberg. While new, simpler guidelines are expected in the coming months, the decision introduces short-term uncer... » read more

Blog Review: May 7


Cadence’s Mayank Bhatnagar examines the challenge of ensuring the functional safety of disaggregated designs and how UCIe can serve as a certified way to connect individual components. Siemens’ Charlie Olson explores the causes of inter-domain leakage when a DC path is formed between two power rails and how to overcome the limitations of traditional electrical rule checking. Synopsys�... » read more

Chip Industry Week in Review


Check out the Inside Chips podcast for our behind-the-scenes analysis of changes at Intel Foundry. Intel rolled out its updated process technology roadmap this week, along with early process design kit (PDK) for its 14A gate-all-around process technology. That node will utilize high-NA EUV, and include direct contact power delivery, the second generation of its backside power delivery techno... » read more

Blog Review: Apr. 30


Cadence’s Sree Parvathy points out how electrothermal analysis can help designers understand how temperature changes affect device behavior, such as mobility, threshold voltage, and saturation to mitigate potential failures due to thermal overstress. In a podcast, Siemens’ Conor Peick, Dale Tutt, and Mike Ellow chat about the transition towards software-defined products and why companies... » read more

Chip Industry Week in Review


To listen to the podcast version, click here. TSMC unveiled an unusually detailed roadmap at this week's North America Technology Symposium, including future architectures for 3D-ICs for high-performance computing and small, extremely low-power chips for AR/VR glasses, and two implementations of system-on-wafer. Fig. 1: TSMC's future packaging and stacking roadmap. Source: TSMC The ... » read more

Chip Industry Week In Review


[Podcast version is here.] TSMC said it will produce 30% of its leading-edge chips in Arizona when all six of its fabs are operational, a total investment of $165 billion, Axios reported. In its latest SEC filing, the foundry said it continues to add capacity in Taiwan, Arizona, Japan, and Germany. The Trump administration launched a Section 232 investigation into semiconductors and relat... » read more

Blog Review: Apr. 16


Siemens’ Tova Levy finds that heterogeneous integration necessitates a shift to a system-level technology co-optimization approach where power, performance, area, cost, and reliability are considered across various components, including silicon, package, interposer, and PCB. Synopsys’ Greg Sorber listens in as Arm’s Rene Haas and Synopsys’ Sassine Ghazi discuss the opportunity for AI... » read more

EDA Revenue Up 11% YoY In Q4 ’24


The EDA industry reported substantial revenue growth in Q4 2024, up 11% to $4.9 billion from $4.44 billion reported in the same quarter of 2023, according to the ESD Alliance, a SEMI Technology Community, announced Monday in its latest Electronic Design Market Data (EDMD) report. The four-quarter moving average, which compares the most recent four quarters to the prior four, rose 12.8%. Wald... » read more

Chip Industry Week In Review


Don't have time to read this? Check out Semiconductor Engineering's Inside Chips podcast.  The U.S. Department of Commerce is investigating TSMC for potential export control violations involving Huawei chips, reports Reuters. The probe follows TechInsights' teardown of a Huawei AI accelerator chip last year. The foundry, meanwhile, maintains it has not shipped any chips to Huawei since 2020... » read more

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