category: Top Stories

category: IoT, Security & Automotive

More Data, More Memory-Scaling Problems
By Bryon Moyer - 14 Jan, 2021 - Comments: 0

Memories of all types are facing pressures as demands grow for greater capacity, lower cost, faster speeds, and lower power to handle the onslaught of new data being generated daily. Whether it's well-established memory types or novel approaches, continued work is required to keep scaling moving forward as our need for memory grows at an accelerating pace. “Data is the new economy of this ... » read more

Verification’s Inflection Point
By Brian Bailey - 14 Jan, 2021 - Comments: 0

Functional verification is nearing an inflection point, brought on by rising complexity and the many tentacles that are intermixing it with other disciplines. New abstractions or different ways to approach the problems are needed. Being a verification engineer is no longer enough, except for those whose concerns is block-level verification. Most of the time and effort spent in verification i... » read more

Power Models For Machine Learning
By Brian Bailey - 14 Dec, 2020 - Comments: 1

AI and machine learning are being designed into just about everything, but the chip industry lacks sufficient tools to gauge how much power and energy an algorithm is using when it runs on a particular hardware platform. The missing information is a serious limiter for energy-sensitive devices. As the old maxim goes, you can't optimize what you can't measure. Today, the focus is on functiona... » read more

Re-Architecting SerDes
By Brian Bailey - 10 Dec, 2020 - Comments: 0

Serializer/Deserializer (SerDes) circuits have been helping semiconductors move data around for years, but new process technologies are forcing it to adapt and change in unexpected ways. Traditionally implemented as an analog circuit, SerDes technology has been difficult to scale, while low voltages, variation, and noise are making it more difficult to yield sufficiently. So to remain releva... » read more

Low Power Still Leads, But Energy Emerges As Future Focus
By Ann Mutschler - 10 Dec, 2020 - Comments: 1

In 2021 and beyond, chips used in smartphones, digital appliances, and nearly all major applications will need to go on a diet. As the amount of data being generated continues to swell, more processors are being added everywhere to sift through that data to determine what's useful, what isn't, and how to distribute it. All of that uses power, and not all of it is being done as efficiently as... » read more

Waking And Sleeping Create Current Transients
By Bryon Moyer - 10 Dec, 2020 - Comments: 0

Silicon power-saving techniques are helping to reduce the power required by data centers and other high-intensity computing environments, but they’ve also added a significant challenge for design teams. As islands on high-powered chips go to sleep and wake up, the current requirements change quickly. This happens in a few microseconds, at most. The rapid change of loading creates a challen... » read more

The Next Big Leap: Energy Optimization
By Brian Bailey - 16 Nov, 2020 - Comments: 1

The relationship between power and energy is technically simple, but its implication on the EDA flow is enormous. There are no tools or flows today that allow you to analyze, implement, and optimize a design for energy consumption, and getting to that point will require a paradigm shift within the semiconductor industry. The industry talks a lot about power, and power may have become a more ... » read more

Designs Beyond The Reticle Limit
By Brian Bailey - 12 Nov, 2020 - Comments: 0

Designs continue to grow in size and complexity, but today they are reaching both physical and economic challenges. These challenges are causing a reversal of the integration trend that has provided much of the performance and power gains over the past couple of decades. The industry, far from giving up, is exploring new ways to enable designs to go beyond the reticle size, which is around 8... » read more

Dealing With Sub-Threshold Variation
By Bryon Moyer - 12 Nov, 2020 - Comments: 0

Chipmakers are pushing into sub-threshold operation in an effort to prolong battery life and reduce energy costs, adding a whole new set of challenges for design teams. While process and environmental variation long have been concerns for advanced silicon process nodes, most designs operate in the standard “super-threshold” regime. Sub-threshold designs, in contrast, have unique variatio... » read more

Difficult Memory Choices In AI Systems
By Ann Mutschler - 12 Nov, 2020 - Comments: 0

The number of memory choices and architectures is exploding, driven by the rapid evolution in AI and machine learning chips being designed for a wide range of very different end markets and systems. Models for some of these systems can range in size from 10 billion to 100 billion parameters, and they can vary greatly from one chip or application to the next. Neural network training and infer... » read more

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