An Insider’s View Of Verifying Custom RISC-V Processor Cores

By Shubhodeep Roy Choudhury - 15 Mar, 2021 - Comments: 0

By Shubhodeep Roy Choudhury, Valtrix Systems, and Lee Moore, Imperas Software Supporting images courtesy of Bill McSpadden, Seagate Technology This article is derived from a talk at the RISC-V Summit in December 2020 that Bill McSpadden, principal verification engineer at Seagate Technology, gave on the challenges and experiences his team faced in the verification of two custom RISC-V proce... » read more

Importance Of A Functional Verification Methodology

By Shubhodeep Roy Choudhury - 24 Sep, 2020 - Comments: 0

A good functional verification methodology is extremely crucial to the success of any semiconductor design project. Missed or late bugs can massively hurt market share, revenue, and brand name even for reputed companies. The complexity of SoC designs along with tight time-to-market constraints demand high levels of efficiency in the verification process. The approach to verify the functional... » read more

Setting Up RISC-V Implementation Verification

By Shubhodeep Roy Choudhury - 26 Mar, 2020 - Comments: 0

This blog provides an overview of STING’s release mode of operation. STING design verification tool is released to the end user in the form of a self extracting script. The script can be used to install the release package in user’s environment. Once the package is installed, the user needs to set few environment variables before the STING executable can be built. The release package ... » read more

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category: RISC-V Design Verification

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An Insider’s View Of Verifying Custom RISC-V Processor Cores

Importance Of A Functional Verification Methodology

Setting Up RISC-V Implementation Verification

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