Changing The IP Supplier Paradigm: Part 2

Semiconductor Engineering sat down with Rich Wawrzyniak, senior market analyst for ASIC and SoC at Semico Research; John Koeter, vice president of marketing for the Solutions Group at Synopsys; Mike Gianfagna, vice president of marketing for eSilicon; Peter McGuinness, director of technology marketing at Imagination Technologies; and Michael Mostovoy, senior director for ASIC development at SanDisk Corporation. In part one of this roundtable, the panelists identified many of the elements that drive the IP industry today: selection, software, configuration, integration and perhaps most importantly the total value provided. The panelists also discussed the potential for fabless, IP less companies emerging.

What follows are excerpts from that conversation. Certain members of the panel also wanted to point out that the comments belong to them and may not represent the views of the company they work for.

Semiconductor Engineering: Are we being biased when we say that a chip must contain unique content? Isn’t PCB design the creation of systems using only prepackaged IP?

McGuinness: Is that truly IP? Many boards today contain a PLA or FPGA to produce a custom result from an assembly of standard components. That provides the secret sauce. But at the end of the day there will always be the need for differentiation.

Koeter: The playing field will not be leveled. It won’t work.

Mostovoy: If you can achieve the necessary value using software and standard IPs, then it may be the most economical approach. But where is your value add?

McGuinness: The very first iPhone is a good example of this. It used a chip supplied by Samsung and the differentiation was completely in software. They added value.

Wawrzyniak: Let’s back up. Why was the iPhone so successful? It was the user interface. Same with the iPad. So why did Apple succeed and all of the others fail? They put the effort into the UI to make it easy to understand and useable. Once they had that right, they moved to their own parts so they could control the value chain.

Koeter: I think it was to differentiate and to control. Apple just turned the industry on its head when they put a 64 bit ARM core into their phone.

Wawrzyniak: But I don’t see that the move from 32 to 64 was a differentiator and the core was IP. As soon as everyone else does the same thing, the checkbox goes away. Now we are back to how well did you build the part and the user interface.

SE: When the IP industry was nascent, usage was hampered by the lack of standards. It took ten years before the industry knew how to deliver a block of IP. Today, IP contains a lot of software. Where are we with the packaging of software?

McGuinness: It is a custom job. It has to be done individually for every system. Consider a graphics API stack. Chunks of it run on the CPU, others in the GPU. It is controlling dataflow throughout the chip. It has to take into account all of the caching strategies, shared virtual memory between the processors and the organization of the memory subsystem. It is a system-level component even though it only relates to one IP block. We spend a lot of time helping our customers do this integration. We attempt to make it as scalable as possible by having reference implementations.

Koeter: We recently announced some prototyping and software development kits for our IP where everything you need is included in the box. You can then personalize this for your own unique situation. It provides a starting point. This came about because of the pull that we are getting from our customers. They no longer just want the hardware IP, they want help with the software, with the prototype.

Gianfagna: Reference designs have become very important.

Mostovoy: Ideally, at some level, software should be hardware independent. This is the hardware abstraction layer. Maybe it is a somewhat ideal concept, but for time to market advantages and migration between generations it is very important.

Gianfagna: Any discussion about power gets you into an interesting problem. Consider a hardware subsystem with multiple hardware domains and abilities to handle power. Now talk to the software team and you will invariably hear comments that they don’t use them, they don’t trust them, they don’t know how they work. This is an area that we need to improve.

Koeter: We have technology for virtualizing the chip, and this is just starting to become mainstream. This enables early software development before a hardware model exists. One of the new use cases is to do software driven power analysis. While this can’t give you absolute numbers, because it is a loosely timed model, you can get relative power values. This is just getting started.

Mostovoy: This raises another point about IP modeling. If you have an IP model in an FPGA prototype, it is hard to emulate power management due to the FPGA limitations. But if you can model power, at all levels of abstraction, more members of the team will become familiar with the concepts and the trust will build. If the first time they can play with it is when they get silicon, they don’t have time to implement this.

Koeter: Moving software earlier in the flow is critical. We have been working with Imagination to produce FPGA prototypes and our customers are now reaping the benefits of this. This includes all of the drivers.

McGuinness: We are always asked for models in advance for software development and we can provide a C or SystemC model. This allows them to do some investigation and gives them some feel of the capabilities.

SE: Is the industry in good shape when it comes to supplying models for virtual prototypes?

Mostovoy: There are no modeling standards. We are trying to use SystemC, but there is no industry wide standard. Everyone is using their own and inventing their own ways.

Koeter: we are putting a huge focus on this. We now have synchronized models for all of our IP, we have synchronized prototypes, but this is still a new capability and it requires a lot of work and added cost. We are in a unique position in that we can monetize that cost through other lines of business – a virtual prototyping business, an FPGA prototyping business. For an average IP vendor, they don’t have this and it will be challenging for them.

McGuinness: The trick is to get a model which is good enough and meets the demand. For example people ask for a cycle accurate model and we say we have one– it is called RTL. But this is not what they want. So how much effort do we put into creating the perfect model for them without it costing too much?

Part three of this roundtable can be found here.