Combining CMOS IC And MEMS Design For IoT Edge Devices

Creating a sensor-based IoT edge device is challenging, due to the multiple design domains involved. But, creating an edge device that combines the electronics using the traditional CMOS IC flow and a MEMS sensor on the same silicon die can seem impossible.

For many years, Tanner has provided customers the ability to interweave MEMS design into this flow, supporting a top-down MEMS IC flow:

IoT edge design requires that analog, digital, RF, and MEMS design domains are designed and work together, especially if they are going on the same die. The design team needs to capture a mixed analog and digital, RF, and MEMS design, layout the chip, and perform both component and top-level simulation. Designing the electronics and MEMS on a single die include these interesting points:

• Schematics can contain IC and MEMS devices. IC devices are modeled using SPICE models and MEMS devices employ behavioral models that are directly modeled in the physical domains such as mechanical, electrostatic, fluidic, and magnetic. MEMS capture is supported by a MEMS Symbol Library.
  
• In order to support the initial MEMS/IC simulation, you can use the System Model Builder to create a MEMS model using analytical equations in SPICE or Verilog-A. Combined with the MEMS Simulation Library, this allows you to verify that the complete design initially works as expected.
• Using the MEMS PCell library, you can layout the design. In addition, the Library Palette provides you with basic layout generators for many MEMS devices that you can use as a starting point.
  
• You can then generate a 3D geometrical model for viewing, virtual prototyping, and to export to finite element analysis (FEA) tools.
• Using the Compact Model Builder, which employs reduced-order modelling techniques, you can create behavioral models from the FEA results for use in final system-level simulation.

Traditionally, the MEMS portion of the design starts by creating a 3D model of a MEMS device and then analyzing the physical characteristics in a third-party finite element analysis (FEA) tool until satisfied with the results. But, you need a 2D mask in order to fabricate the MEMS device. How do you derive the 2D mask from the 3D model? You follow the mask-forward flow that results in a successfully-fabricated MEMS device.

Start with 2D mask layout to create the device. The 3D Solid Modeler then takes the layout and a set of 3D fabrication process steps to automatically generate a 3D solid model of your device. Export that 3D model and perform 3D analysis using your favorite finite element tool and then iterate if you find any issues. Make the appropriate changes to the 2D mask layout and then repeat the flow. Using this mask-forward design flow, you can converge on a working fabricated MEMS device because you are directly creating masks that will eventually be used for fabrication, rather than trying to work backwards from the 3D model.

Fusing CMOS electronics with a MEMS device on the same IC is a complex process that requires a solution that ensures that the IC works correctly under real-world conditions. Combining the mask-forward MEMS flow within the integrated Tanner design IC flow helps ensure successful, multi-domain IoT edge device design.

To view a whitepaper on this topic, click here.