Enabling efficient design of custom debug and trace subsystems for complex SoCs.
To address the challenge of increasing development cost and complexity faced by the semiconductor industry, SoC designers need to think ahead and provide the right hardware platform to help software developers create optimized software in a timely manner. The goal of this paper is to show, through high level steps, how to create a custom debug and trace subsystem for a design quickly and easily. This paper will be of interest to those who want to learn about debug and trace for System-on-Chips (SoCs) and be of specific interest to the following:
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