At 15nm and beyond, printing of pitches of 64nm and below will be required, and for EUV to replace ArF multi-exposure approaches patterns will have to be printed in a single-exposure process.
For the logic generations of the 15 nm node and beyond, the printing of pitches at 64nm and below are needed. For EUV lithography to replace ArF-based multi-exposure techniques, it is required to print these patterns in a single exposure process. The k1 factor is roughly 0.6 for 64nm pitch at an NA of 0.25, and k1 0.52 for 56nm pitch. These k1 numbers are of the same order at which model based OPC was introduced in KrF and ArF lithography a decade or so earlier. While we have done earlier work that used model-based OPC for the 22nm node test devices using EUV,1 we used a simple threshold model without further resist model calibration. For 64 nm pitch at an NA of 0.25, the OPC becomes more important, and at 56nm pitch it becomes critical. For 15 nm node lithography, we resort to a full resist model calibration using tools that were adapted from conventional optical lithography. We use a straight shrink 22 nm test layout to assess post-OPC printability.
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