A methodology for evaluating a broad range of hardware implementations to find the most power-efficient architecture.
High-level decisions have the most impact on power consumption, but the effect of those decisions cannot be known until the hardware is implemented. This paper walks the reader through an industrial high-level low-power design methodology that enables the designer to consider and quantitatively evaluate a broad range of hardware implementations to find the most power-efficient architecture. This paper concludes with two industry case studies using this high-level low power methodology.
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