Mounting complexity, time-to-market pressures and design-team staffing cutbacks raise the value of integrated and tested IP portfolios.
By Ann Steffora Mutschler
As individual blocks of IP in an IC design grow to more than 1 million gates, making sure each block functions reliably and interfaces with the system properly is a make-or-break scenario for many companies.
For one thing, getting it right is absolutely critical as the semiconductor industry reaches its maturity point with margins harder to reach. Coupled with an industry-wide downturn, even the largest IDMs are looking outside their internal teams for non-differentiated IP, which is standardized physical IP that is not a differentiator in a design.
“One of the factors that this economy will generate is more outsourcing of IP, which has been a very significant trend over the last several years, with the largest IDMs outsourcing a significant amount of IP,” says John Koeter, VP of marketing for IP solutions at Synopsys Inc., who notes that 17 of the top 20 semiconductor companies in the world buy IP from Synopsys. “So it’s pretty significant. And this includes digital and mixed signal IP that historically has been something large companies have viewed as a core competency,”
He believes the strong movement toward outsourcing, especially interface IP such as USB, DDR, PCI and SATA, is occurring because those types of IP are hard to design and are getting more complex. However, he points out, they don’t fundamentally differentiate a design.
In addition to outsourcing, consolidation in the overall semiconductor industry has been a major driver in IP industry consolidation, says Brani Buric, executive VP of marketing at Virage Logic.
Buric defines physical IP as IP that resides close to the silicon, including all kinds of digital IP, analog IP, memories, logic and high-speed interfaces. “With every new process node, complexity of reliable development and quality assurance for physical IP is becoming more and more expensive, and more and more timing critical. With physical IP, the key criteria of consolidation is that the barrier to entry of new players in the commercial market is very high because the cost of development and silicon validation,” Buric explains.
A second type of IP can be labeled system-level or RTL-level IP, which includes microprocessors. “Here,” he says, “the situation is different because there are a couple of fundamental blocks like microprocessors where there is market separation around a few companies that are leading in certain applications.” Also in this category are blocks that have a definite market window and thus a short lifetime, such as WIMAX and Bluetooth.
That said, with cost as king, semiconductor and systems companies are squeezing expenses and redeploying their engineers from non-differentiating tasks to more core-differentiating tasks.
To support the outsourcing, IP providers have made a number of consolidating moves over the past several years aimed at streamlining the IP delivery process and improving reliability for customers.
Most notably, IP industry leader ARM bought Artisan, while rival MIPS acquired Chip Idea.
Synopsys has made a number of acquisitions over the last four or five years, including InSilicon, which added PCI and USB to the company’s IP portfolio. Next, the company acquired Accelerant Networks for high speed, mixed signal CERTES capabilities, followed by Mosaid, Cascade and others.
Meanwhile, Virage purchased Ingot Design Systems for its DDR capabilities and Impinj for multiple time programmable memory.
Other players, like Mentor Graphics Corp. have scaled their investments in the IP space back, although still engaging with existing customers, according to Bill Martin, general manager of Mentor’s IP Division.
It is widely agreed that this consolidation will continue and will be of benefit to customers.
Tom Lantzsch, VP of Arm’s PIPD Division, says the semiconductor industry is hitting its maturity point, and like other industries that hit their maturity point there are fewer opportunities.
“From that perspective, this entire consolidation process is going through a natural evolution that most industries go through,” Lantzsch says. “Combined with the fact that the complexity of the products that we are asked to service our customers with are increasing rapidly, there is a corollary that they cost much more for us to develop. Based upon the IP business model that most companies use that has an upfront licensing fee and royalties, to get that investment back unfortunately takes much longer than most of us want to think about.”
What does this mean to customers? “In many cases, an improvement,” he says. “Our customers are becoming more global. The demands of supporting them are increasing. Incrementally, they have design centers working on products in multiple regions of the world. And even if they procure IP in one place, they may be using it in several. The ability to support them on a global basis is a key driving point. I don’t believe they’ve lost anything from a technical capability [due to consolidation] and they’ve probably gained in their ability to get support and investment on these products on a global basis.”
Further, the number of products that ARM brings out on a 32nm design platform versus at 180nm is approximately five times larger. Those products also are supported under a common EDA framework of all the major tool vendors, and they have been tested so the interoperability issues that historically drove customers to choose multiple vendors have been minimized.
Synopsys is seeing a similar trend for both technical and business reasons. “We’re seeing a huge push from our customer base in this direction,” Koeter says. “Buying IP is complex. There is a long technical process to evaluate a particular piece of IP, negotiating the business terms especially around things like warranty indemnification tends to be very difficult. And if you buy multiple pieces of IP and they don’t work together, you start to get finger pointing.”
For those reasons, as well as purchasing power, customers are trying to consolidate their IP vendors because IP is a volume-based business, wherein the more you buy the better discount you get. “They just have to put one legal contract in place, then can evaluate IP methodologies and apply them to future purchases so they don’t have to go through a detailed benchmark every time. They can buy in bulk and they get favorable payment terms. Typically a lot of our contracts are three year contracts and they are structured as IP VPAs, so customers commit a certain amount of dollars to us and in return get very favorable business terms and get to spread their payments over the duration of that contract,” he says.
Virage’s Buric believes reliability definitely rises with consolidation and is driving more careful choices on IP purchases. “It is becoming epidemic to see people being very conservative about quality because the cost of failure is too high. The cost of redesign has two components. One is tangible, which can be a couple of million or tens of millions of dollars. Or the intangible, like missing a market window, which is basically irrecoverable damage.”
For those reasons, end users are looking very carefully to avoid any damage from usage of unreliable IP components.
As semiconductor foundries have an interest in manufacturing chips with reliable IP, they have begun providing a limited set of pre-verified physical building blocks to coincide with advanced process development.
ARM’s Lantzsch recognizes that in some cases, a foundry would be viewed as a competitor, but stresses that very few foundries actually provide IP, and understanding why they do it is key.
He notes that historically the business model for Artisan (now part of ARM) was to service smaller companies largely on older technology nodes or more mature technology nodes, and market penetration for ARM/Artisan in those spaces is strong. “With that being the case, we weren’t really involved in early technology development at all,” he admits, but ARM now believes it is critically important as it moves on to the next class of customers, which are tier-one companies. Those larger companies are beginning to face some of the same challenges that fabless ASIC vendors have had in the past, where they don’t want to develop things that don’t add differentiation.
“It’s made us have to accelerate our technology road map significantly. What that means is bringing up the libraries in parallel with the process development. When we weren’t doing that, the foundries needed to do that,” Lantzsch says.
Still, ARM maintains strong relationships with a number of foundries including TSMC and the Common Platform. In fact, ARM and the Common Platform announced last September that ARM will develop and license a comprehensive physical IP design platform meant to help customers achieve optimal power, performance, and area for current and future ARM Cortex processors.
“We’d been working with them well in advance of that announcement on how to get the most out of the litho and creating the most density in the cells, what the tradeoffs are between design rules and standard cells and how does that then impact, in our case, ARM system performance on the CPUs. And that iterative process early on as part of process development, we believe is critically important,” he said of the close collaboration between the companies. The IDMs were used to doing that for years – they did that themselves internally. So for us to be able to address that market, we had to replicate, in many cases, what they were doing. Of the foundries that predominantly offer libraries, a significant reason to do so is largely this issue. They need to do that as part of their process development, and driving things even into the EDA space like routing technologies. It’s that iterative process on the advanced technologies that there’s a need to do that and if it’s not satisfied by a third party partner, then they were forced to do it themselves.
With IP consolidation to continue, closer partnerships and better reliability will be the result, with users ultimately benefitting from the activity.
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