Less Waste, Faster Results: Why Virtual Twins Are Critical To Future Semiconductor R&D

By Wojciech (Wojtek) Osowiecki, Martyn Coogans, Saravanapriyan Sriraman, Rakesh Ranjan, Yu (Joe) Lu, and David M. Fried

The semiconductor industry has long depended on physical experimentation to achieve the precision needed for advanced chip manufacturing. However, this traditional method comes with significant environmental costs—high energy consumption, material waste, and greenhouse gas (GHG) emissions.

With an emphasis on atomic precision, affordability, and speed to solution, Lam is pioneering new standards for sustainable R&D that not only address environmental costs but unlock the potential to reduce carbon emissions further.

Lam Research is using virtual twins (also known as digital twins) within the Semiverse Solutions environment to increase sustainability along with innovation, representing just the beginning of what could be a massive industry transformation.

Simulation using virtual twins can significantly reduce the carbon footprint of semiconductor R&D. The studied R&D activities minimized physical experimentation (on wafer processing and parts manufacturing) while adding relatively negligible computing emissions.

Why it matters: Virtual twins give engineers a comprehensive understanding of how a tool or process will perform in the real world without requiring extensive physical prototypes or experiments.

• Virtual twins are digital replicas of physical systems that allow engineers to test and simulate processes at the reactor and feature scale to help optimize semiconductor tools in real time.
• Everything from plasma dynamics to deposition and etch processes can be simulated.

This capability helps to accelerate tool development and has the potential to dramatically reduce the consumption of physical resources like silicon wafers, chemicals, and gases—all of which contribute to the semiconductor industry’s carbon footprint.

Digging deeper: Manufacturing a single blanket 300-mm silicon wafer (the simplest possible material required for on-tool testing) produces at least 9kgCO₂e (kilogram CO₂ equivalent) in emissions. A single full-loop wafer routinely requires more than a ton of collective CO₂ emissions to manufacture. This is equivalent to more than 6 months of electricity consumption for an average household.

• High emissions are due to the high temperatures (greater than 1,000° Celsius) required to produce polysilicon and, subsequently, single-crystal silicon.
• Modern integration requires a growing number of manufacturing steps which adds emissions and waste generation at each step.

Quantifying impacts

Using virtual twins in our labs, we discovered that they resulted in less material consumption and the ability to reduce or even circumvent steps that routinely use high amounts of valuable resources. However, we could not find evidence externally quantifying the environmental benefits of virtual twins in semiconductor tool R&D.

Therefore, we conducted our own virtual twin research at Lam. We tested virtual twinning on a variety of use cases, including hardware prototyping, process optimization, and device characterization.

Clear results: Based on our findings, virtual twins significantly reduced the carbon footprint of semiconductor R&D. In all cases, implementing the modeling techniques led to lower emissions due to reduced physical experimentation.

• By comparing two scenarios—one relying on physical experimentation and the other on virtual twins and simulation—we demonstrated that virtualization has the potential to achieve the same results while reducing carbon emissions by more than 80% in specific projects, with a cumulative reduction of 20% across multiple projects.
• This 20% target is considered a conservative estimate, with the possibility for even more significant reductions.

Across applications, the carbon footprint of Semiverse Solutions projects (green) was lower than a hypothetical estimate without virtualizations (gray).

Virtualization can conserve other vital resources, such as water and chemicals used extensively in semiconductor manufacturing.

You can see the results of these experiments—along with our methodology—in the IEEE journal article, Achieving Sustainability in the Semiconductor Industry: The Impact of Simulation and AI.

Semiverse Solutions

Merging the physical and virtual semiconductor worlds into a seamless ecosystem is at the heart of Lam’s Semiverse Solutions, a suite of products and services that blend physical and virtual infrastructure.

By integrating artificial intelligence (AI) and machine learning into Lam’s virtual twin models, we can further increase the sustainability potential of Semiverse Solutions.

• Virtual twins are continuously updated with AI using real-world data, making them even more accurate and responsive to changes in tool design or process parameters.
• This level of sophistication enables engineers to optimize tool development processes much faster than traditional methods, all while helping to minimize environmental impact.

For example, in plasma-based wafer fabrication, where tool performance can vary with small equipment adjustments, virtual twins can simulate thousands of variations in a matter of hours, instead of weeks or even months in a physical lab.

Sustainable manufacturing

While current virtual twin applications in Semiverse Solutions focus on tool development, the long-term vision for this technology is far more expansive.

Virtual twinning could eventually be used for the entire semiconductor manufacturing process, from wafer integration to full chip performance optimization, which has the potential to further reduce carbon emissions and resource consumption. Each step in this process—from etch and deposition to chip assembly—presents an opportunity to reduce the need for high-energy, resource-intensive physical tests.

Key takeaways

• Simulation appears almost universally less resource-intensive than physical experimentation, so researchers should seek opportunities to solve problems using computation methods as long as they manage to reduce cleanroom operations.
• At the same time, wafer fabrication equipment R&D is often conducted on tight deadlines, so modeling experts should collaborate closely with lab researchers to ensure that virtualizations are accurate and fast enough to avoid the need for wafer tests.
• Techniques that deliver the best result should be prioritized, regardless of their relative computational intensity, as a lower overall carbon footprint typically correlates with fewer physical experiments.
• Full-loop, leading-edge patterned wafers are the most carbon-intensive, so it is best to work with small chips instead of whole wafers wherever possible.

Martyn Coogans is a marketing director at Lam Research.

Saravanapriyan Sriraman is a senior director of engineering at Lam Research.

Rakesh Ranjan is a senior plasma applications engineer at Lam Research.

Yu (Joe) Lu is a senior manager in data science at Lam Research.

David M. Fried is corporate vice president of Semiverse Solutions at Lam Research.