Metrics For Measuring Performance And Power In IoT SoC Designs

The problem confronting chip designers developing IoT SoCs is the need for high compute performance and low power consumption. This is especially true for SoCs being developed for devices required to operate for years on a battery.

One example is the new generation of electronic shelf label (ESL) with a requirement of five years. The ESL receives central server pricing updates along with a few words of text that can occur as frequently as hourly. How does a design team select an embedded processor for such an application? One way is to use a benchmark that specifies some metric per MHz, such as the EEMBC CoreMark, to better evaluate alternative solutions.

An embedded processor for IoT devices, such as the ESL, is expected to provide security, communications, sensing and control, and power management. Robust security is essential to prevent network attacks, physical attacks, and to protect against software/firmware theft. Because IoT devices operate autonomously and provide data to remote clouds, low-power communication requires the processor to compute proprietary or standard protocols such as RFID, 802.15.4, Bluetooth Smart, Bluetooth 4.1, WiFi 802.11 ah, and LTE Cat-0.

Processing a variety of sensor data coming from the control interface requires versatile DSP capabilities. And power management is essential to enable months to years of operation on small batteries or harvested energy, thus demanding processors with efficient power management for long sleep cycles, fast power-up/power-down, and the ability to operate at varying clock frequencies—to sip energy rather than full-on or full-off. The EEMBC benchmark provides guidance on how well an embedded core will meet these requirements.

Built upon objective, clearly defined, application-based criteria, the EEMBC CoreMark benchmark reflects real-world applications and tests a processor’s basic pipeline structure, as well as the ability to test basic read/write operations, integer operations, and control operations. Over time, CoreMark has replaced Dhrystone MIPS as the industry standard for measuring processor, DSP, and compiler performance.

Andes Technology has taken the step of having all its processors certified to the EEMBC CoreMark to provide designers a comparison metric to use in evaluating processors for their design. This month the company announced that the EEMBC Technology Center (ETC) has officially certified CoreMark results for Andes’ entire CPU product line. EEMBC certification ensures that scores are repeatable, accurate, obtained fairly, and derived according to EEMBC’s rules. The measurement of CoreMark/MHz can provide a good initial comparison of performance efficiency among different cores with similar pipelining.

“Andes is the first EEMBC member to have all of its processor cores certified for the CoreMark benchmark,” said Markus Levy, EEMBC president. “As designers increase the number of cores going into embedded applications, especially the ultra low-power Internet of Things, CoreMark becomes less a measure of brute force performance and more a measure of the right amount of performance for a specific design goal.”