Power To Fly

Why chips and airliners are on a similar trajectory and what’s most important to both of them.


By Barry Pangrle
As technologies mature, they often follow similar profiles. Back on Oct. 14th I heard Lesley Curwen of the BBC interviewing Charles Champion, executive vice president of engineering at Airbus. Champion said that over the last 40 years the airline industry has reduced emissions and fuel burn by 70%. He pointed out that the industry initially focused on speed and the tendency now is more towards efficiency.

This sounded like a very familiar story to me, especially as we approach the sixth anniversary of the introduction of the Intel Pentium 4 HT 570J, which had an advertised operating frequency of 3.8 GHz. At some point, the laws of physics step in and place hard limits on a given technology. Bipolar Emitter Coupled Logic (ECL) eventually gave way to NMOS technology, and NMOS eventually to CMOS, all largely due to power efficiency. For passenger airliners, the limit is near the speed of sound. For decades, faster and faster passenger planes were built until that physical barrier was approached. Granted, the Concorde, which was operated by Air France and British Airways, flew at supersonic speeds. But it was only profitable when it was possible to sell seats at prices substantially above the prices for subsonic flights. When that market dried up the plug was pulled on the program. For CMOS it’s been the inability to continue to scale down supply voltages due to transistor threshold voltages being held relatively constant in order to keep leakage power somewhat in check.

From 1987 to 2004, x86 processor clock frequencies went from 20 MHz to almost 4 GHz. That’s a factor of almost 2 x 10^5! Five orders of magnitude in 17 years, or nearly a doubling of clock speed every year over that 17-year period.


Mark Bohr, Senior Fellow at Intel has stated, “Achieving very high operating frequencies is no longer the prime target for new microprocessors. Instead, the goal has shifted to delivering higher performance combined with lower power. “Power efficiency” is the main scaling goal for chips used both in small hand held devices and in large data centers.”

Newer and more efficient passenger aircraft continue to be in demand and the industry continues to produce new aircraft. The semiconductor industry is also adapting to change in the landscape and will continue to thrive by producing more power efficient designs.

–-Barry Pangrle is a solutions architect for low-power design and verification at Mentor Graphics

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