Power Verification in Sochi?

An estimated 3 billion viewers watched in wonder at the high tech artistry of the opening ceremonies of the $50 billion Sochi Winter Olympics. As many viewers later learned, these events are often not without glitches. The after buzz was all about the Olympic ring failure. When only four of the five snowflakes transitioned into rings, the broadcasters resorted to rehearsal footage attempting to mask the failure of this defining Olympic moment.

(Source: http://www.telegraph.co.uk)

During the commentary of the 85-country athlete procession, the announcers highlighted that for many countries the athletes were coming together for the first time as a team in Sochi. The 230-athlete U.S. Team is the largest winter squad in Olympic history. In total, the games have 2,900 athletes participating in 98 events.

(Source: http://en.wikipedia.org)

What is the relevance to Power Verification you ask? The failing rings, (not to mention the facility issues) and team assimilation are all effectively verification challenges. The analogy is how different IP subsystems interact or behave when they are finally assembled together in the context of the SoC. An interesting focus area in this domain is the growing complexity of power intent verification, specifically the increasing challenges in power state verification.

Let’s illustrate the complexity through an example: An SoC having 30 power domains with 2 possible voltage states, plus 4 power domains with 6 possible voltage states (DVFS), results in 230×64 = 1.4 trillion possible states. Practically, in designs with multiple power and voltage domains, power controllers will limit the number of attainable power states. Realistically, this design example would probably be implemented using 1000 defined power states, which is still a challenging verification task.

Power intent verification requires that the relationships between power states are defined with power state tables (PST). This intent is captured using the Unified Power Format (UPF), the latest specification being IEEE 1801-2013. In SoC designs it will be common that individual blocks or IP subsystems have their own UPF. At the SoC level, the individual UPF files and PSTs need to be merged in order to verify the power intent of the complete design.

SpyGlass Power Verify performs these merge steps automatically. During this merge process, knowledge of compatible PSTs, incomplete PSTs and conflicting PSTs are used to optimize the solution space for runtime efficiency. The SpyGlass Power Verify flow provides an independent, exhaustive verification of power and voltage domains and is a single tool for RTL, netlist and post-layout verification.

The Sochi Winter Olympic Games are now in full motion; teammates and competitors are well known, shortcomings in facilities understood and the buzz from the opening ceremony glitches fading. Success for the host country depends on many complex systems operating efficiently. These systems must be verified individually and also in relationship with each other. Success for the athlete depends on both individual and team performance. Verification comes during the medal ceremony.