Chip Industry Week In Review


Computex in Taiwan: Arm and Nvidia introduced an AI PC platform, RTX Spark, with an Arm-based Grace CPU, Blackwell RTX GPU, and unified memory. Cadence announced a fully autonomous virtual agentic AI design engineer, enabling customers to run dynamic simulations in automated workflows. Intel launched Xeon 6+, its first data-center CPU built on Intel Foundry's 18A process. The company... » read more

The Sub-2nm Paradox


Key Takeaways: Process variation and physics are changing semiconductor design, manufacturing, and economics at 2nm and below. Even though new manufacturing processes are being introduced, it's taking longer for them to mature. The focus for many chip designs is faster data movement and more efficient computing, rather than just relying on more transistors per mm2. At 2nm an... » read more

Chip Industry Week In Review


ECTC Panel-level packaging, hybrid bonding, new substrates, and fine-pitch interconnects topped the list of advanced packaging technologies at ECTC this week. Among the announcements: ASE launched an automated 310mm × 310mm panel-level packaging production line. Expected to enter production in the first half of 2027, the line is compatible with FOCoS and FOCoS-Bridge pa... » read more

Low-Temp Solders Are Suddenly Critical For Chiplets And Photonics


Key Takeaways: Tin-bismuth-based solders enable reduced warpage and compatibility with silicon photonics and other temperature-sensitive components. A novel soldering process using white light could help prevent cracks in flip-chip BGA package solder balls, while reducing the carbon footprint. Hypoeutectic Sn-Bi based solders prove especially promising as an SAC305 replacement. ... » read more

Options Grow For Standardizing Data Movement And Sharing Resources


Semiconductor Engineering sat down to discuss memory interfaces, interconnects, and memory access scaling with Madhumita Sanyal, senior director of technical product management at Synopsys; Swadesh Choudhary, senior principal engineer at Intel; Siamak Tavallaei, senior principal engineer at Samsung SSI; and Mohsen Asad, senior director of technology at Credo. What follows are excerpts of a disc... » read more

Chip Industry Week in Review


Global The U.S. created a licensing path for Nvidia H200 shipments in January and has since approved sales to 10 Chinese companies, but so far no shipments have been confirmed, reports Reuters. With a looming end-of-year expiration, SIA, SEMI, and other business groups are urging Congress to extend the US semiconductor tax credit and expand it to cover semiconductor design and other act... » read more

Chip Industry Week In Review


Manufacturing ASE and WUS are jointly building a ~$1.1B advanced packaging hub in Kaohsiung, Taiwan, for fan-out chip-on-substrate (FOCoS) and flip-chip ball grid array (FC BGA) technologies. The new site is expected to be completed by September 2029. SpaceX filed documents for a “Terafab” semiconductor manufacturing and computing facility at Gibbons Creek Reservoir in Texas, with a... » read more

Foundry Capacity Is Limiting Who Competes At Leading Edge Nodes


Key Takeaways: Leading-edge node access is increasingly reserved for hyperscalers, squeezing smaller chip developers. Chiplets and advanced packaging offer a path forward, but raise cost, complexity, and risk — especially for smaller teams. Chip architecture is now driven as much by capacity, yield, and economics as by technical goals. The benefits of device scaling are sl... » read more

Chip Industry Week In Review


Deals Marvell acquired Polariton Technologies, a Swiss developer of plasmonics-based silicon photonics devices. Onto Innovation is partnering with Rigaku, combining Onto’s analysis software with Rigaku’s CD-SAXS platform for advanced semiconductor process control. Onto also agreed to acquire a 27% stake in Rigaku for about $710M. Tesla plans to use Intel’s 14A process for its T... » read more

AI Growing Impact On Chip Design And EDA Tools


Key Takeaways Many workflows in the data center are customer-specific, which is part of the reason there is so much interest in agentic AI-enabled tools. Large systems companies are pressing EDA vendors for performance improvements to keep pace with their AI workflows. The makeup of design teams is changing as AI infiltrates more of the chip design process. Experts at the Ta... » read more

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