Implementing Strong Security For AI/ML Accelerators


A number of critical security vulnerabilities affecting high-performance CPUs identified in recent years have rocked the semiconductor industry. These high-profile vulnerabilities inadvertently allowed malicious programs to access sensitive data such as passwords, secret keys and other secure assets. The real-world risks of silicon complexity The above-mentioned vulnerabilities are primaril... » read more

HBM2E and GDDR6: Memory Solutions for AI


Artificial Intelligence/Machine Learning (AI/ML) growth proceeds at a lightning pace. In the past eight years, AI training capabilities have jumped by a factor of 300,000 driving rapid improvements in every aspect of computing hardware and software. Meanwhile, AI inference is being deployed across the network edge and in a broad spectrum of IoT devices including in automotive/ADAS. Training and... » read more

Startup Funding: February 2020


AI drew the biggest investments last month, with two AI hardware companies and one autonomous driving software startup pulling in nine-figure sums. Investors also pumped money into semiconductor manufacturing and test equipment, notably around EUV lithography and advanced packaging. AI Hardware SambaNova Systems received $250M in Series C funding for its software-defined hardware for AI, le... » read more

Chip Design Is Getting Squishy


So many variables, uncertainties and new approaches are in play today across the chip industry today that previous rules are looking rather dated. In the past, a handful of large companies or organizations set the rules for the industry and established an industry roadmap. No such roadmap exists today. And while there are efforts underway to create new roadmaps for different industries, inte... » read more

An Increasingly Complicated Relationship With Memory


The relationship between a processor and its memory used to be quite simple, but in modern SoCs there are multiple heterogeneous processors and accelerators, each needing a different means of accessing memory for maximum efficiency. Compromises are being made in order to preserve the unified programming model of the past, but the pressures are increasing for some fundamental changes. It does... » read more

The Challenges Of Building Inferencing Chips


Putting a trained algorithm to work in the field is creating a frenzy of activity across the chip world, spurring designs that range from purpose-built specialty processors and accelerators to more generalized extensions of existing and silicon-proven technologies. What's clear so far is that no single chip architecture has been deemed the go-to solution for inferencing. Machine learning is ... » read more

The Cost Of Programmability


Nothing comes for free, and that is certainly true for the programmable elements in an SoC. But without them we are left with very specific devices that can only be used for one fixed application and cannot be updated. Few complex devices are created that do not have many layers of programmability, but the sizing of those capabilities is becoming more important than in the past. There are... » read more

Understanding SLAM (Simultaneous Localization And Mapping)


Amol Borkar, senior product manager for AI and computer vision at Cadence, talks with Semiconductor Engineering about mapping and tracking the movement of an object in a scene, how to identify key corners in a frame, how probabilities of accuracy fit into the picture, how noise can affect that, and how to improve the performance and reduce power in these systems. » read more

Week In Review: Auto, Security, Pervasive Computing


AI/Edge Arm putting AI (artificial intelligence) and machine learning (ML) on the Cortex-M processor by offering IP for a microNPU for Cortex-M. The company says in a press release that it will deliver a 480x uplift in ML performance. The new Cortex-M IP is Arm Ethos-U55 NPU, which Arm says is the industry’s first microNPU (neural processing unit). Arm is hoping the new IP will start an expl... » read more

Where Timing And Voltage Intersect


João Geada, chief technologist at ANSYS, talks about the limitations for power delivery networks and what processors can handle, why the current solutions to these issues are causing failures, and how voltage reduction can affect timing. » read more

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