tag: Blue Cheetah

3D-IC For The Masses
By Brian Bailey - 13 Mar, 2025 - Comments: 0

The concepts of 3D-IC and chiplets have the whole industry excited. It potentially marks the next stage in the evolution of the IP industry, but so far, technical difficulties and cost have curtailed its usage to just a handful of companies. Even within those, they do not appear to be seeing benefits from heterogeneous integration or reuse. Attempts to make this happen are not new. "A decade... » read more

Multi-Die Design Complicates Data Management
By Adam Kovac - 27 Feb, 2025 - Comments: 0

The continued unbundling of SoCs into multi-die packages is increasing the complexity of those designs and the amount of design data that needs to be managed, stored, sorted, and analyzed. Simulations and test runs are generating increasing amounts of information. That raises questions about which data needs to be saved and for how long. During the design process, engineers now must wrestle ... » read more

Chip Architectures Becoming Much More Complex With Chiplets
By Ed Sperling and Ann Mutschler - 30 Jan, 2025 - Comments: 0

The migration from monolithic SoCs to chiplet-based designs is creating a confusing array of options and tradeoffs for design teams working at the leading edge, and the number of choices is only going to increase as third-party chiplets begin pouring into the market. That hasn't dampened the appetite for chiplets, however, which are deemed essential for future generations of semiconductors f... » read more

Chiplets Still A Challenge With UCIe 2.0
By Brian Bailey - 30 Jan, 2025 - Comments: 0

Plug-and-play chiplets are a popular goal, but does UCIe 2.0 move us any closer to that becoming a reality? The problem is that the current drivers of the standard are not after interoperability in the way that plug-and-play requires. Released in August 2024, UCIe 2.0 touts higher bandwidth density and improved power efficiency, as well as new features supporting 3D packaging, a manageable s... » read more

Chip Industry Week In Review
By The SE Staff - 24 Jan, 2025 - Comments: 0

The new Trump administration was quick to put a different stamp on the tech world: President Trump rescinded a long list of Biden’s executive orders, including those aimed at AI safety and the mandate for 50% EVs by 2030. Roughly 1.3 million EVs were sold in the U.S. in 2024, up 7.3% from 2023. The new administration announced $500 billion ($100 billion initially) in private sector in... » read more

Strain, Stress In Advanced Packages Drives New Design Approaches
By Ann Mutschler - 19 Dec, 2024 - Comments: 2

Thermal and mechanical stresses are creating significant challenges in heterogeneous chiplet assemblies, increasing the time and cost required to work through all the possible physical effects, dependencies, and interactions, and driving demand for new tools. Unlike in the past, when various components were crammed into a planar SoC on a relatively thick substrate, the new substrates are bei... » read more

Chip Industry Week In Review
By The SE Staff - 06 Dec, 2024 - Comments: 0

Global chips sales hit a record $56.9 billion in October, a 22% increase versus October 2023, according to the Semiconductor Industry Association. Also, global semiconductor equipment billings reached $30.38 billion in Q3 2024, a 19% YoY increase and 13% growth QoQ, SEMI reported. TSMC commenced equipment installation for its 2nm fab in Kaohsiung, Taiwan, six months ahead of schedule. The 2n... » read more

Top-Down Vs. Bottom-Up Chiplet Design
By Ann Mutschler - 26 Nov, 2024 - Comments: 0

Chiplets are gaining widespread attention across the semiconductor industry, but for this approach to really take off commercially it will require more standards, better modeling technologies and methodologies, and a hefty amount of investment and experimentation. The case for chiplets is well understood. They can speed up time to market with consistent results, at whatever process node work... » read more

Chiplets Make Progress Using Interconnects As Glue
By Ann Mutschler - 31 Oct, 2024 - Comments: 0

Breaking up SoCs into their component parts and putting those and other pieces together in some type of heterogeneous assembly is beginning to take shape, fueled by advances in interconnects, complex partitioning, and industry learnings about what works and what doesn't. While the vision of plug-and-play remains intact, getting there is a lot more complicated than initially imagined. It can ... » read more

Blog Review: Oct. 9
By Liz Allan - 09 Oct, 2024 - Comments: 0

Siemens’ Stephen Chavez looks at the key benefits and challenges to achieving a successful ECAD-MCAD collaboration. Cadence’s Nayan Gaywala shares the AXI4 locking mechanism when implementing an Xtensa LX-based multi-core system on a Xilinx FPGA platform, using a dual-core design mapped to a KC705 platform as an example. Synopsys’ Vincent van der Leest digs into SRAM PUFs and their ... » read more

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