tag: Chris Rowen

Architecting For AI
By Ann Mutschler - 17 Jul, 2018 - Comments: 0

Semiconductor Engineering sat down to talk about what is needed today to enable artificial intelligence training and inferencing with Manoj Roge, vice president, strategic planning at Achronix; Ty Garibay, CTO at Arteris IP; Chris Rowen, CEO of Babblelabs; David White, distinguished engineer at Cadence; Cheng Wang, senior VP engineering at Flex Logix; and Raik Brinkmann, president and CEO of O... » read more

Babblelabs: Deep Learning Speech Processing
By Ann Mutschler - 26 Jan, 2018 - Comments: 0

Pronounced “babble labs,” a startup that is the brainchild of serial entrepreneur [getperson id="11244" comment="Chris Rowen"] is setting out to transform speech processing and will leverage deep learning to do so. Rowen, CEO of Babblelabs, has spoken for some time about move of processing to more general purpose hardware, with applications layered on top, so it’s not so surprising his... » read more

What’s Missing In Deep Learning?
By Ann Mutschler - 12 Jan, 2017 - Comments: 0

It is impossible today to be unaware of deep learning/machine learning/neural networks -- even if what it all entails is not even clear yet. Someone who is intimately familiar with this area, and has some thoughts on this is Chris Rowen, founder of Tensilica (now part of Cadence), who is now a self-described hat juggler. He is still active Cadence several days a month, working technically on... » read more

Why Build New Silicon?
By Ann Mutschler - 14 Jan, 2016 - Comments: 1

You can’t turn around these days without hearing talk of our increasingly connected lives, tethered by the Internet of Everything (IoE), and cloud this, cloud that. Don’t get me wrong, I’m not knocking this next big thing because on many levels it is inspiring creativity, as all big things do. And the ramifications are still getting worked out as far as the impact on chip design, and t... » read more

Architecturally Optimizing Memory Bandwidth
By Ann Mutschler - 27 Mar, 2015 - Comments: 0

Making sure that an SoC’s [getkc id="22" kc_name="memory"] bandwidth is optimized is a crucial part of the design process today given its significance toward overall system performance. There are many ways to approach this issue, and all of them can have a direct bearing on the competitiveness of a chip in terms of both power and performance. So where should you start? “Number one, c... » read more

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