Power Reduction Through Sequential Optimization

Dealing with power is a multifaceted challenge and is an equal-opportunity problem — everybody can contribute to the solution and at many levels of abstraction. At the architectural or system level, fundamental tradeoffs are done and the engineering team decides how much memory the system needs, what type of processor, what performance, area, power, among other things. Some people may use ... » read more

Verifying Power Optimized Designs Using Sequential Analysis

All power optimization tools can perform combinational optimization, where there is an opportunity to gate a register clock input, based on the combinational logic that is feeding the register’s data input. While this method works well and does not alter the logic behavior at the register, the problem is that it leaves additional power saving opportunities on the table. However, sequential... » read more