Analog Consolidation Spurs New Round Of Startups


A new wave of startups is rising to meet the growing need for specialized analog customization in chip design projects, opening the door to more affordable custom designs. These startups are breathing new life into a sector, which as a result of consolidation has favored only the largest chipmakers. As larger analog companies acquire smaller ones, many companies that were previously engaged ... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive, Mobility Tesla employees have been viewing customer videos, according to an investigative report by Reuters. The news outlet surveyed and interviewed Tesla employees, who described using the footage for both legitimate purposes and entertainment purposes within the company. Some employees forwarded videos to coworkers. Even Tesla CEO Elon Musk was not immune. Employees found an in... » read more

Startup Funding: March 2023


Funding was broadly spread between sectors in March, with automotive edging ahead thanks to a more than $100 million round for a company manufacturing electric, autonomous heavy commercial trucks for freight logistics. To keep up with the amount of information presented by cars and ADAS, several companies raised funds for head-up displays with increasing levels of detail and expanded fields of ... » read more

Week In Review: Design, Low Power


Rambus will acquire Hardent, a provider of design services and IP. Rambus said Hardent's silicon design, verification, compression, and Error Correction Code (ECC) expertise will provide key resources for the Rambus CXL Memory Interconnect Initiative. “Driven by the demands of advanced workloads like AI/ML and the move to disaggregated data center architectures, industry momentum for CXL-base... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys unveiled a new neural processing unit (NPU) IP and toolchain. DesignWare ARC NPX6 NPU IP scales from 4K to 96K MACs with power efficiency of 30 TOPS/Watt. A single instance offers 250 TOPS at 1.3 GHz on 5nm processes in worst-case conditions, or up to 440 TOPS by using new sparsity features, which can increase the performance and decrease energy demands of executing a n... » read more

Week In Review: Design, Low Power


RISC-V Western Digital announced big plans for RISC-V with a new open source RISC-V core, an open standard initiative for cache coherent memory over a network, and an open source RISC-V instruction set simulator. The SweRV Core features a 2-way superscalar design with a 32-bit, 9 stage pipeline core. It has clock speeds of up to 1.8Ghz on a 28mm CMOS process technology and will be used in vari... » read more