Connecting Emulated Designs To Real PCIe Devices

These days verification teams no longer question whether hardware assisted verification should be used in their projects. Rather, they ask at which stage they should start using it. Contemporary System-on-Chip (SoC) designs are already sufficiently complex to make HDL simulation a bottleneck during verification, without even mentioning hardware-software co-verification or firmware and softwa... » read more

Verification Facing Unique Inflection Point

The Design and Verification Conference and Exhibition (DVCon) attracted more than 1,100 people to San Jose last week, just slightly less than last year. While a lot of focus, and most of the glory, goes to design within semiconductor companies, it is verification where most of the advancements are happening and thus the bigger focus for DVCon. The rate of change in verification and the producti... » read more

Early Power Budgeting for Live Applications

Today, power and energy efficiency are at the forefront of SoC design. Functional activity has a first-order impact on power. Increasing functional integration requires a comprehensive analysis of power consumption across complex modes of operation. Power inefficiency in any one mode can have a significant impact on the competitiveness of a product or time to market. So designers are looking fo... » read more