Mask Economics Shape High-NA EUV Adoption


Key Takeaways: Mask costs are not stopping leading-edge scaling, but they increasingly influence design, node, and process choices. High-NA EUV will tighten requirements for CD, EPE, local CDU, mask 3D modeling, stitching, and materials. Reduced depth of focus in High-NA EUV will drive new resist, etch, film, and absorber approaches. Experts at the table: Semiconductor Engin... » read more

Chip Industry Week In Review


Notable deals Cadence and Intel Foundry inked a multi-year agreement to advance design technology co-optimization and create PDKs for Intel Foundry's 14A process. Nvidia and SK hynix announced a multi-year partnership to co-develop memory technology for AI infrastructure and physical AI. Teradyne unveiled an integrated test cell solution with TEL that supports known-good device scree... » read more

Curvilinear Masks Push The Limits Of Inspection And Metrology


Key Takeaways: Curvilinear masks require native data flows across design, mask data prep, writing, inspection, and metrology. Inspection is shifting from finding all defects to identifying which mask variations actually print on wafer. High-NA EUV will intensify inspection challenges, particularly for small printable defects and actinic contrast limits. Experts at the table... » read more

Mask Technology Faces A New Set Of Challenges


Key Takeaways: Mask inspection and repair remain the critical bottleneck, even as multi-beam writers have reduced mask-writing constraints. Curvilinear masks are becoming viable for critical layers, but qualification, metrology, and inspection standards still lag production needs. Scaling curvilinear requires curvilinear-native data flows, model-based checks, GPU/HPC compute, and les... » read more

Expert Panel Sees History Of Continuous Photomask Innovations As Key To The Future


The eBeam Initiative conducted its 14th annual eBeam Initiative Luminaries survey in July and reported the results on September 23, 2025 to more than 200 attendees at its annual meeting during the BACUS SPIE Photomask Technology conference. Industry luminaries representing 51 companies from across the semiconductor ecosystem—including photomasks, electronic design automation (EDA), chip desig... » read more

Disruptive Changes Ahead For Photomasks?


Experts at the Table: Semiconductor Engineering sat down with four experts to explore the current state and future direction of mask-making, with insights from Harry Levinson, principal lithographer at HJL Lithography; Aki Fujimura, CEO of D2S; Ezequiel Russell, senior director of mask technology at Micron; and Christopher Progler, executive vice president and CTO at Photronics. What follows ... » read more

Photomask Changes And Challenges At Mature And Advanced Nodes


Experts at the Table: Semiconductor Engineering sat down to discuss the current state and future direction of mask-making, with Harry Levinson, principal lithographer at HJL Lithography; Aki Fujimura, CEO of D2S; Ezequiel Russell, senior director of mask technology at Micron; and Christopher Progler, executive vice president and CTO at Photronics. What follows are excerpts of that conversation.... » read more

Mask Complexity, Cost, And Change


Experts at the Table: As leading-edge lithography nodes push further into EUV and beyond, mask-making has become one of the most critical and costly aspects of semiconductor manufacturing. At the same time, non-EUV applications are stretching the lifetime of older tools and processes, challenging the industry to find new solutions for both ends of the spectrum. Semiconductor Engineering sat dow... » read more

Reflecting On The SPIE Advanced Lithography + Patterning Symposium 2025


The mood at this year’s SPIE Advanced Lithography + Patterning Symposium was decidedly upbeat. The outlook for business is good, due in large measure to expectations of high demand for chips, driven by artificial intelligence (AI). To realize the potential of AI, increases in chip performance and efficiency are needed, which, in turn, requires advanced patterning. In the Symposium’s technic... » read more

EUV’s Future Looks Even Brighter


The rapidly increasing demand for advanced-node chips to support everything-AI is putting pressure on the industry's ability to meet demand. The need for cutting-edge semiconductors is accelerating in applications ranging from hyperscale data centers powering large language models to edge AI in smartphones, IoT devices, and autonomous systems. But manufacturing those chips relies heavily on ... » read more

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