tag: Kaynes Technology

Chip Industry Week In Review

By The SE Staff - 23 Aug, 2024 - Comments: 0

Chinese firms imported almost $26 billion worth of chipmaking machinery, according to fresh trade data released by China’s General Administration of Customs this week, Bloomberg reports. Meanwhile, the global semiconductor manufacturing industry continued to show signs of improvement in Q2 2024 with significant growth of IC sales, stabilizing capital expenditure, and an increase in install... » read more

The Week In Review: Design

By Jesse Allen - 12 Aug, 2016 - Comments: 0

IP Avery Design Systems released NVM Express over Fabrics 1.0 and NVM Express 1.2.1 extensions to its NVM-Xactor verification IP, enabling verification of both NVMe over PCIe and NVMe over Fabrics designs. Arastu Systems uncorked an optimized DDR3/4 DRAM Controller Core, which works with DFI 3.1 compatible PHY. The core supports all key DDR3/DDR4 features and additional features like Erro... » read more

Trending Articles

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

Chip Industry Week In Review

Amkor-TSMC deal; new law speeds semiconductor projects; NSTC launch; quartz supply; chiplet partitioning; semiconductor materials; ferroelectric devices; data center power; data routing in heterogeneous chip designs.

by The SE Staff

Chip Industry Week In Review

Google's AlphaChip; 300mm fab equip spending; TSMC-EDA partnerships; $123M CHIPS Act; CXL memory standards; MIPI's A-PHY v2.0; 12-stack HBM3E; LLMs for chip design and manufacturing; CHIPS Metrology access.

by The SE Staff

Government Chip Funding Spreads Globally

Nations vie for a piece of the semiconductor pie with offers of cash, subsidies, tax breaks, and other approaches.

Chip Industry Week In Review

Auto chiplet consortium; more nuke plants for AI; critical IC materials risk; TIMs; Foxconn in Mexico; ML in auto MCUs; 3nm PHY chiplet; chip health monitoring; AI test.

by The SE Staff

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Foundry competition heats up in three dimensions and with novel technologies as planar scaling benefits diminish.

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3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

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Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

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Chip Industry Week In Review

Softbank's acquisition; advanced packaging funding; glass substrates; engineered copper wire; semi equipment set new record; HBM4; AI chips rake in funding; X-ray inspection; apprenticeships.

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Startup Funding: Q2 2024

Big rounds for AI chips; 91 startups raise $2.6 billion.

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