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Lower Power Chips: What To Watch Out For


Low-power design in advanced nodes and advanced packaging is becoming a multi-faceted, multi-disciplinary challenge, where a long list of issues need to be solved both individually and in the context of other issues. With each new leading-edge process node, and with increasingly dense packaging, the potential for problematic interactions is growing. That, in turn, can lead to poor yield, cos... » read more

Back To Basics On Multi-Voltage Verification


It has been more than a decade since the paradigm of voltage-aware Booleans came about and the world of multi-voltage verification took off. We started with 3-5 island SoCs and now stare at 300+ islands on a single SoC. While we have a well-developed standard (IEEE 1801/UPF) for the expression and analysis of voltage variation, it is apt to not forget some of the basics and see how they will ca... » read more