Unraveling PCIe 6.0 Loopback And Digital Near-End Loopback Feature


The PCIe specification has given a specific Link Training and Status State Machine (LTSSM) state named Loopback, which is intended for test and fault isolation use. Basically, it gives a mechanism that involves looping back the data that was received in the Loopback LTSSM state. The entry and exit behavior are specified, and all other details are implementation-specific. Loopback can op... » read more

5G Chips Add Test Challenges


The advent of chips supporting millimeter-wave (mmWave) 5G signals is creating a new set of design and testing challenges. Effects that could be ignored at lower frequencies are now important. Performing high-volume test of RF chips will require much more from automated test equipment (ATE) than is required for chips operating below 6 GHz. “MmWave design is a pretty old thing,” said Y... » read more