tag: Microsoft

Chip Industry Week in Review
By The SE Staff - 02 Aug, 2024 - Comments: 0

Okinawa Institute of Science and Technology proposed a new EUV litho technology using only four reflective mirrors and a new method of illumination optics that it claims will use 1/10 the power and cost half as much as existing EUV technology from ASML. Applied Materials may not receive expected U.S. funding to build a $4 billion research facility in Sunnyvale, CA, due to internal government... » read more

Defining Chip Threat Models To Identify Security Risks
By Adam Kovac - 01 Aug, 2024 - Comments: 0

Experts At The Table: As hardware weaknesses have become a major target for attackers, the race to find new ways to strengthen chip security has begun to heat up. But one-size does not fit all solution. To figure out what measures need to be taken, a proper threat model must be assessed. Semiconductor Engineering sat down with a panel of experts at the Design Automation Conference in San Franci... » read more

Chip Industry Technical Paper Roundup: July 30
By Linda Christensen - 30 Jul, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library, including a best paper award winner at ISCA. [table id=246 /] More ReadingTechnical Paper Library home » read more

Chip Industry Week In Review
By The SE Staff - 26 Jul, 2024 - Comments: 0

The U.S. Department of Commerce and Amkor Technology signed a deal to provide up to $400 million in funding, under the CHIPS and Science Act, to build a previously announced end-to-end advanced packaging plant. The combined funding is expected to total about $2 billion. The new facility will add some 2,000 jobs in Peoria, Arizona. The SK hynix Board approved its Yongin Semiconductor Cluster... » read more

Will AI Disrupt EDA?
By Brian Bailey - 25 Jul, 2024 - Comments: 1

Generative AI has disrupted search, it is transforming the computing landscape, and now it's threatening to disrupt EDA. But despite the buzz and the broad pronouncements of radical changes ahead, it remains unclear where it will have impact and how deep any changes will be. EDA has two primary roles — automation and optimization. Many of the optimization problems are NP hard, which means ... » read more

Survey of CXL Implementations and Standards (Intel, Microsoft)
By Technical Paper Link - 22 Jul, 2024 - Comments: 0

A new technical paper titled "An Introduction to the Compute Express Link (CXL) Interconnect" was published by researchers at Intel Corporation, Microsoft, and University of Washington. Abstract "The Compute Express Link (CXL) is an open industry-standard interconnect between processors and devices such as accelerators, memory buffers, smart network interfaces, persistent memory, and solid-... » read more

Blog Review: July 10
By Jesse Allen - 10 Jul, 2024 - Comments: 0

Cadence's Paul Graykowski suggests using real number modeling to streamline digital mixed-signal verification using logic simulators and hardware emulators. Siemens' John McMillan and Microsoft's Amit Kumar introduce the basics of 3D-IC, describe the flow and data management challenges, look at the evolution of TSMC 3DBlox 1.0 and 2.0, and detail a physical verification and reliability analy... » read more

Digital Twins Find Their Footing In IC Manufacturing
By Laura Peters - 09 Jul, 2024 - Comments: 0

Momentum is building for digital twins in semiconductor manufacturing, tying together the various processes and steps to improve efficiency and quality, and to enable more flexibility in the fab and assembly house. The movement toward digital twins opens up a slew of opportunities, from building and equipping new fabs faster to speeding yield ramps by reducing the number of silicon-based tes... » read more

Chip Industry Week In Review
By The SE Staff - 31 May, 2024 - Comments: 0

JEDEC and the Open Compute Project rolled out a new set of guidelines for standardizing chiplet characterization details, such as thermal properties, physical and mechanical requirements, and behavior specs. Those details have been a sticking point for commercial chiplets, because without them it's not possible to choose the best chiplet for a particular application or workload. The guidelines ... » read more

Chip Industry Technical Paper Roundup: May 28
By Linda Christensen - 28 May, 2024 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=229 /] More ReadingTechnical Paper Library home » read more

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