Week In Review: Design, Low Power


Tools & IP Cadence debuted System-Level Verification IP (System VIP), a suite of tools and libraries for automating SoC testbench assembly, bus and CPU traffic generation, cache-coherency validation, and system performance bottleneck analysis. Tests created using the System VIP solution are portable across Cadence simulation, emulation and prototyping engines and can also be extended to po... » read more

Week In Review: Design, Low Power


Arteris IP will acquire the assets of Magillem Design Services, combining Arteris' NoC interconnect IP with Magillem's chip design and assembly environment. Magillem’s software products will continue to be offered separately from the Arteris interconnect IP offerings and the joined company will continue to execute on Magillem’s existing product and technology roadmaps. Substantially all Mag... » read more

Week In Review: Design, Low Power


Nvidia will acquire Arm from SoftBank in a $40 billion deal. Nvidia says that Arm will continue to operate its open-licensing model while maintaining global customer neutrality. SoftBank acquired Arm in 2016 for $32 billion; it also holds an ownership stake in Nvidia that is expected to remain under 10%. The deal does not include Arm's IoT Services Group. The acquisition will need to pass regul... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys introduced its DesignWare USB4 IP solution consisting of controllers, routers, PHYs, and verification IP. It supports USB4, DisplayPort with HDCP 2.3 security, PCI Express, and Thunderbolt 3 connectivity protocols through USB Type-C connectors and cables. The USB4 IP operates at up to 40 Gbps, twice the maximum data rate of USB 3.2, and is backwards compatible with USB 3... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Imagination Technologies and BAIC Capital have formed an automotive joint venture to create a new automotive fabless semiconductor company focused on China as a client. The JV will be headquartered in the Zhongguancun Integrated Circuit Design Park in Beijing, China, with Bravo Lee serving as CEO. The JV will license IP and software from Imagination to create automotive-grade SoCs. ... » read more

Week In Review: Design, Low Power


Tools & IP Ansys' RedHawk-SC multiphysics signoff software was certified for all TSMC advanced process technologies, including N16, N12, N7, N6 and N5. The certification includes extraction, power integrity and reliability, signal electromigration (EM) and thermal reliability analysis and statistical EM budgeting analysis. Aldec launched a new FPGA accelerator board for high performance... » read more

Week In Review: Design, Low Power


Inphi Corporation and Synopsys finalized the acquisition of eSilicon. Synopsys acquired certain IP assets from eSilicon, including TCAMs and multi-port memory compilers, as well as its Interface IP portfolio with High-Bandwidth Interface (HBI) IP and a team of R&D engineers; it did not disclose terms of the deal. Inphi Corporation bought the rest of the company for approximately $216 millio... » read more

Week In Review: Design, Low Power


eSilicon debuted its 7nm high-bandwidth interconnect (HBI)+ PHY IP, a special-purpose hard IP block that offers a high-bandwidth, low-power and low-latency wide-parallel, clock-forwarded PHY interface for 2.5D applications such as chiplets. HBI+ PHY delivers a data rate of up to 4.0Gbps per pin. Flexible configurations include up to 80 receive and 80 transmit connections per channel and up to 2... » read more

Week In Review: Design, Low Power


M&A ANSYS will acquire Livermore Software Technology Corp. (LSTC), a provider of explicit dynamics and other advanced finite element analysis technology. Based in Livermore, CA, LSTC was founded in 1987 to commercialize the DYNA3D technology developed at the Lawrence Livermore National Laboratory. DYNA3D became the company's premier product LS-DYNA, a general purpose nonlinear finite eleme... » read more

Week In Review: Design, Low Power


The MIPI Alliance released MIPI I3C Basic v1.0, a subset of the MIPI I3C sensor interface specification that bundles 20 of the most commonly needed I3C features for developers and other standards organizations. The royalty-free specification includes backward compatibility with I2C, 12.5 MHz multi-drop bus that is over 12 times faster than I2C supports, in-band interrupts to allow slaves to not... » read more

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