Architecting For Optimal Interface IP Integration


Semiconductor Engineering sat down to discuss the design and integration of complex interface IP with Ty Garibay, VP of engineering at Altera; Brian Daellenbach, president of Northwest Logic; Frank Ferro, senior director of product management for memory and interface IP at Rambus; Saman Sadr, director of analog design at Semtech; and Navraj Nandra, senior director of marketing for analog/mixed ... » read more

Collaboration Accelerates Moore’s Law


Moore's Law dictates that the number of transistors in dense, integrated circuits will double approximately every two years. Maintaining this pace of scaling, however, has become increasingly difficult given the ever-increasing complexity inherent with new chip starts. Additionally, the cost of using leading-edge process technology is prohibitively expensive. As a result, collaboration amon... » read more

The Week In Review: Design


Partnerships With an aim to drive adoption of software testing in Japan, Coverity, a Synopsys company said it has tapped OGIS-RI, a Japan-based distributor of IT solutions to partner with Coverity's software testing platform and OGIS-RI's open source license and vulnerability management tool. Maxscend Technologies has joined CEVA’s CEVAnet partner program and will offer complete solutio... » read more

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