Week In Review: Design, Low Power

By Jesse Allen - 21 Aug, 2020 - Comments: 0

Tools & IP SiFive announced OpenFive, a self-contained and autonomous business unit that will offer custom silicon solutions with differentiated IP. OpenFive will be led by Dr. Shafy Eltoukhy, SVP, and general manager of OpenFive. OpenFive debuted with a new Die-to-Die (D2D) interface IP portfolio to serve next-generation chipset based designs for networking, HPC, and AI markets. The D2D p... » read more

Open Source Hardware Risks

By Ann Mutschler - 08 Jan, 2020 - Comments: 0

Open-source hardware is gaining attention on a variety of fronts, from chiplets and the underlying infrastructure to the ecosystems required to support open-source and hybrid open-source and proprietary designs. Open-source development is hardly a new topic. It has proven to be a successful strategy in the Linux world, but far less so on the hardware side. That is beginning to change, fueled... » read more

Can Low-Power Devices Be Secure?

By Jeff Dorsch - 10 Nov, 2016 - Comments: 0

Successfully designing a low-power, high-performance chip design is an accomplishment, but effectively implementing cybersecurity in such devices makes it much more difficult. Safety, particularly functional safety for automotive and military/aerospace applications, also can be a prime concern in creating low-power, high-performance integrated circuits and systems. When combined with securit... » read more

Securing The IoT

By Jeff Dorsch - 26 Oct, 2016 - Comments: 1

Last week’s massive distributed denial-of-service attack, directed at Dyn DNS—a small New Hampshire-based company that operates part of the Internet’s Domain Name System—brought many popular websites to a crawl. Among those affected were such giants as Airbnb, Reddit, Twitter, Amazon and Netflix. The Internet outages spread from the East Coast of the United States to the rest of the ... » read more

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Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Nuvoton

Week In Review: Design, Low Power

Open Source Hardware Risks

Can Low-Power Devices Be Secure?

Securing The IoT

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Entities, people and technologies explored