Americas Chip Funding Energizes Industry

By Liz Allan - 23 Oct, 2024 - Comments: 0

This is the second in a series of articles tracking government chip investments. See part one here (global), part 3 covering EMEA is here and Asia here. Since the first announcement of a non-binding preliminary memorandum of terms with BAE Systems in December 2023, the U.S. Department of Commerce has rolled out comprehensive plans to support more than a dozen companies in order to shore up... » read more

Chip Industry Week In Review

By The SE Staff - 27 Sep, 2024 - Comments: 0

Global spending on 300mm fab equipment is expected to reach a record US$400 billion from 2025 to 2027, according to SEMI. Key drivers are the regionalization of semiconductor fabs and the increasing demand for AI chips in data centers and edge devices, with China, South Korea, and Taiwan leading the way. The Biden-Harris Administration launched the National Semiconductor Technology Center’... » read more

Dualtronics: Photonic Devices on the Cation Face and Electronic Devices on the Anion Face of the Same Wafer

By Technical Paper Link - 26 Sep, 2024 - Comments: 0

A new technical paper titled "Using both faces of polar semiconductor wafers for functional devices" was published by researchers at Cornell University and Polish Academy of Sciences. Find the technical paper here. Published September 2024. Cornell University's news release is here, stating "Cornell researchers, in collaboration with a team at the Polish Academy of Sciences, have develope... » read more

Chip Industry Week In Review

By The SE Staff - 17 May, 2024 - Comments: 0

President Biden will raise the tariff rate on Chinese semiconductors from 25% to 50% by 2025, among other measures to protect U.S. businesses from China’s trade practices. Also, as part of President Biden’s AI Executive Order, the Administration released steps to protect workers from AI risks, including human oversight of systems and transparency about what systems are being used. Intel ... » read more

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Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

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eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

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tag: Polar Semiconductor

Americas Chip Funding Energizes Industry

Chip Industry Week In Review

Dualtronics: Photonic Devices on the Cation Face and Electronic Devices on the Anion Face of the Same Wafer

Chip Industry Week In Review