System Level Power Integrity Verification For Multi-Core Microprocessors With FIVR


A technical paper titled "A Compressed Multivariate Macromodeling Framework for Fast Transient Verification of System-Level Power Delivery Networks" was published by researchers at Politecnico di Torino and Intel Corporation. Abstract: This paper discusses a reduced-order modeling and simulation approach for fast transient power integrity verification at full system level. The reference str... » read more