tag: programming models

Programming Processors In Heterogeneous Architectures

By Ann Mutschler - 08 Jun, 2023 - Comments: 0

Programming processors is becoming more complicated as more and different types of processing elements are included in the same architecture. While systems architects may revel in the number of options available for improving power, performance, and area, the challenge of programming functionality and making it all work together is turning out to be a major challenge. It involves multiple pr... » read more

Trending Articles

Electromigration Concerns Grow In Advanced Packages

Higher density, heat, and more materials make it harder to ensure reliability.

by Laura Peters

Chip Industry Week In Review

Applied Materials' $4B facility at risk; AI chip bonanza; Japan, U.S. alliance; Rapidus' U.S. subsidiary; EDA revenue up; TSMC $6.6B funding; Infineon, Amkor team up; S. Korea's big bet; Apple's processor overhaul; high-NA EUVL defect system; chiplet HW security module; new Spectre attack.

by The SE Staff

What Works Best For Chiplets

Not all chiplets are interchangeable, and options will be limited.

by Anne Meixner

Architecting Chips For High-Performance Computing

Data center IC designs are evolving, based on workloads, but making the tradeoffs for those workloads is not always straightforward.

by Ann Mutschler

EDA Looks Beyond Chips

System design, large-scale simulations, and AI/ML could open multi-trillion-dollar markets for tools, methodologies, and services.

Knowledge Centers
Entities, people and technologies explored

Related Articles

The Rising Price Of Power In Chips

More data requires faster processing, which leads to a whole bunch of problems — not all of which are obvious or even solvable.

by Ed Sperling

The Future Of Memory

From attempts to resolve thermal and power issues to the roles of CXL and UCIe, the future holds a number of opportunities for memory.

by Karen Heyman

SRAM Scaling Issues, And What Comes Next

While it will remain a workhorse memory, using SRAM at advanced nodes requires new approaches.

by Karen Heyman

Verifying Hardware Security With RTL Simulation

Measuring how injected faults propagate through a design and how long they remain in the system.

by Taruna Reddy

Architecting Chips For High-Performance Computing

Data center IC designs are evolving, based on workloads, but making the tradeoffs for those workloads is not always straightforward.

by Ann Mutschler

Backside Power Delivery Adds New Thermal Concerns

Lack of shielding, routing issues, and new mechanical stresses could have broad impact on standard cell design.

by Karen Heyman

Glitch Power Issues Grow At Advanced Nodes

Problem is particularly acute in AI accelerators, and fixes require some complex tradeoffs.

by Ann Mutschler

Rethinking Memory

Von Neumann architecture is here to stay, but AI novel architectures and 3D structures create a need for new testing tools.

by Karen Heyman

About

Navigation

Connect With Us

Facebook
Twitter @semiEngineering
LinkedIn
YouTube

Copyright ©2013-2024 SMG | Terms of Service | Privacy Policy