FOPLP Gains Traction in Advanced Semiconductor Packaging

By Gregory Haley - 21 Nov, 2024 - Comments: 0

Fan-Out Panel-Level Packaging (FOPLP) for advanced nodes, once hindered by manufacturability and yield challenges, is emerging as a promising solution to meet the industry’s demands for higher integration densities and cost efficiency. Traditionally, FOPLP has been a go-to solution for cost-sensitive applications in consumer electronics, IoT devices, and mid-tier automotive systems. Its ab... » read more

Custom Substrates Save Assembly Time, Resources

By QP Technologies - 20 Jun, 2024 - Comments: 0

Time-to-market (TTM) and performance are two of the most pressing issues in chip design and manufacturing. Designing devices for high-speed, high-performance applications requires immediate access to substrates so that product development can proceed quickly. Quick substrate access is also vital to validating intellectual property (IP) cores used in application-specific ICs (ASICs) – all of w... » read more

The Race To Glass Substrates

By Gregory Haley - 29 May, 2024 - Comments: 4

The chip industry is racing to develop glass for advanced packaging, setting the stage for one of the biggest shifts in chip materials in decades — and one that will introduce a broad new set of challenges that will take years to fully resolve. Glass has been discussed as a replacement material for silicon and organic substrates for more than a decade, primarily in multi-die packages. But ... » read more

Chip Industry Week In Review

By The SE Staff - 12 Apr, 2024 - Comments: 0

Applied Materials may scale back or cancel its $4 billion new Silicon Valley R&D facility in light of the U.S. government's recent announcement to reduce funding for construction, modernization, or expansion of semiconductor research and development (R&D) facilities in the United States, according to the San Francisco Chronicle. TSMC could receive up to $6.6 billion in direct funding... » read more

Silicon Photonics Manufacturing Ramps Up

By Gregory Haley - 21 Mar, 2024 - Comments: 0

Circuit scaling is starting to hit a wall as the laws of physics clash with exponential increases in the volume of data, forcing chipmakers to take a much closer look at silicon photonics as a way of moving data from where it is collected to where it is processed and stored. The laws of physics are immutable. Put simply, there are limits to how fast an electron can travel through copper. The... » read more

Building Better Bridges In Advanced Packaging

By Laura Peters - 21 Sep, 2023 - Comments: 1

The increasing challenges and rising cost of logic scaling, along with demands for an increasing number of features, are pushing more companies into advanced packaging. And while that opens up a slew of new options, it also is causing widespread confusion over what works best for different processes and technologies. At its core, advanced packaging depends on reliable interconnects, well-def... » read more

Week In Review: Semiconductor Manufacturing, Test

By Gregory Haley - 18 Aug, 2023 - Comments: 0

Intel dropped out of a $5.4 billion deal to purchase Tower Semiconductor in Israel. Intel cited the inability to obtain regulatory approval in a timely manner as the reason for ending the deal signed in February. Intel will pay a $353 million termination fee to Tower. The silicon wafer supply has moved back into positive territory for 2023 thanks to a 7% decline in wafer shipments combined w... » read more

Goals of Going Green

By Anne Meixner - 25 Jul, 2023 - Comments: 0

The chip industry is stepping up efforts to be seen as environmentally friendly, driven by growing pressure from customers and government regulations. Some manufacturers have been addressing sustainability challenges for more than a decade, but they are becoming more aggressive in their efforts, while others are joining them. A review of sustainability reports across the semiconductor indust... » read more

Heterogeneous Chip Assembly Helps Optimize Medical And Wearable Devices

By Promex Industries - 19 Apr, 2023 - Comments: 0

Heterogeneous integration (HI) has significant implications for the medical, health, and wearables industry. At Promex, we utilize a variety of complex assembly processes to achieve HI for medical and biotech applications. This post will take a closer look at the processes associated with assembling these classes of devices. Click here to read more. » read more

Power Semiconductors: A Deep Dive Into Materials, Manufacturing & Business

By The SE Staff - 03 Apr, 2023 - Comments: 0

Whether you’re the owner of the average smartphone, commuting on trains, or driving around in a Tesla, you use power semiconductor devices every day. In a technology-dependent world, these devices are everywhere, and demand for more types of chips using different materials is growing. In the past, most engineers paid little attention to power semiconductors. They were deemed commodity, off... » read more

← Older posts

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?