Blog Review: Feb. 4


After the Super Bowl, Ansys' Thierry Marchal looks at making football safer through virtual prototyping. Sports concussions are a serious danger for athletes from youths to professionals, and modeling head and brain impacts may lead not only to safer football helmets but a better understanding of how to lower the chance of brain injuries in sports. Synopsys' Ray Varghese continues his series... » read more

The Week In Review: Design/IoT


Mergers/Acquisitions Lattice Semiconductor agreed to pay $600 million for Silicon Image, which makes connectivity solutions for high-definition content for mobile and consumer electronics. Lattice already makes programmable connectivity solutions, so the combined IP portfolio is expected to strengthen its position in wired and wireless markets. Tools Cadence expanded the tool portfolio it ... » read more

The Week In Review: Design/IoT


Legal A U.S. District Court invalidated three patents related to emulation, which were part of a patent infringement lawsuit filed by Synopsys against Mentor Graphics. The fourth patent will be reviewed by the U.S. Patent Trial and Appeal Board. Synopsys said it is evaluating an appeal and criticized the decision. "Synopsys strongly disagrees with the court's decision," said a Synopsys spokesp... » read more

Blog Review: Jan. 21


Mentor's John Day attended the IBM talk at last week's Automotive News World Congress in Detroit. The upshot: The automotive industry is ripe for disruptive changes, but autonomous vehicles aren't likely to be part of those changes. Cadence's Axel Scherer spins a tale of movie and electronic magic, with a little debug technology thrown in—and notes how quickly things that seemed magical a... » read more

Higher Frequencies Mean More Memory


As SoCs get more complex, whether due to higher frequencies or adding more functionality, there is a spillover effect on bandwidth, [getkc id="22" kc_name="memory"] and power. There is no simple way to just turn up the clock frequency in a complex [getkc id="81" kc_name="SoC"]. That relatively straightforward objective will likely require more power domains, more cores, more ways to move sig... » read more

Digital TV: The Need For Speed


With CES just finishing up, I wanted to take a closer look at the changes in the digital TV market, and what affect those changes have on high performance memory and serial links. Just five years ago, the United States made the transition from analog to digital television. At the time, standard definition digital TV was common, with screens that contained 345 thousand pixels per frame. Recen... » read more

New Challenges For Wearables


It was Dick Tracy’s wristwatch communicator that triggered the public’s appetite for wearable electronics. Introduced in a 1946 syndicated comic strip, the idea was so compelling that it inspired the release of hundreds of wrist-based devices ranging from walkie-talkies to calculators to GPS trackers, heartbeat and movement monitors. Yet despite the public’s fascination with this kind of ... » read more

Blog Review: Jan. 14


Ansys' Bill Vandermark flags the top five engineering technology articles for the week, leaning heavily on CES. The 3D scanner is intriguing because of the link to 3D printing. Mentor's Robin Bornoff returns to the drawing board to design a better water heater. Unfortunately, you probably won't be able to find one of these in your local Home Depot—ever. eSilicon's Jack Harding defines w... » read more

Security Risks Grow Worse


Semiconductor Engineering sat down to discuss security issues for connected devices with Marc Canel, vice president of security at [getentity id="22186" comment="ARM"]; Paul Kocher, president and chief scientist for the Cryptography Research division of [getentity id="22671" e_name="Rambus"]; Michael Poitner, global segment marketing manager at [getentity id="22499" e_name="NXP"]; Felix Baum, h... » read more

Designing For Security


Stacked die may improve performance and lower power, but the use of [getkc id="203" kc_name="through-silicon vias"] (TSVs) could add new security risks. As IC structures go, the vertical component of these chip packages is both a boon and a bust. Three-dimensional geometries allow for much less complexity in design by stacking two-dimensional dies and interconnecting them in the third dimens... » read more

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