Reducing Risk In The Semiconductor Supply Chain

By Laura Peters - 23 May, 2024 - Comments: 0

Companies that were hit with chip shortages during the pandemic are changing their strategies to prevent future problems, deploying a combination of supply chain mapping, second sourcing, and digital transformation. Those shortages caused a $200 billion loss for automotive manufacturers, and the disruptions were far more widespread, in many cases lasting for years. Companies of all sorts wer... » read more

Blog Review: June 14

By Jesse Allen - 14 Jun, 2023 - Comments: 0

Synopsys' Richard Solomon and Gary Ruggles examine the Compute Express Link (CXL) protocol and how it could unlock new ways of doing computing such as enabling efficient heterogeneous computing architectures, accelerating data-intensive workloads, and facilitating advanced real-time analytics. Cadence's Andre Baguenie explains how to convert an electrical signal to a logic value using the Ve... » read more

Startup Funding: May 2023

By Jesse Allen - 07 Jun, 2023 - Comments: 0

Photonic interconnects were an area of activity in May, with two companies raising funds for what could be much faster chip-to-chip and chiplet-to-chiplet links. Microstructured optics and metasurfaces also drew investment, with four companies creating products for a range of applications from flexible LEDs to multi-wavelength spectral imaging. The large language models that power many gener... » read more

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Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Resilinc

Reducing Risk In The Semiconductor Supply Chain

Blog Review: June 14

Startup Funding: May 2023

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