Blog Review: June 14

CXL enables heterogeneous architectures; converting electrical signal to logic value; constraint-driven PCB design; IR drop; optimal DRAM Saddle Fins.


Synopsys’ Richard Solomon and Gary Ruggles examine the Compute Express Link (CXL) protocol and how it could unlock new ways of doing computing such as enabling efficient heterogeneous computing architectures, accelerating data-intensive workloads, and facilitating advanced real-time analytics.

Cadence’s Andre Baguenie explains how to convert an electrical signal to a logic value using the Verilog-AMS language and explores and compares three behavioral models.

Siemens’ Stephen Chavez continues exploring PCB design best practices with a look at constraint-driven design, or designing with the intent of meeting both physical and electrical rules that are defined and implemented up front during schematic creation to help ensure the final end-product is correct by construction.

Ansys’ Akanksha Soni examines the types of IR drop and some best practices to minimize the chance of slower performance and fatal errors, such as proper power and ground plane placement and on-chip decoupling capacitors.

Coventor’s Tae Yeon Oh considers ways to improve DRAM device performance using Saddle Fins with Buried Channel Array Transistors (BCAT) without modifying the existing DRAM device schematics by developing optimal fin structures.

Arm’s Chris Goodyer digs into using vector math functions on Arm using Libamath, including the scale of performance increases possible, accuracy requirements, and how to use the functions directly in code.

Renesas’ DK Singh finds that environmental air sensors are among the fastest-growing vertical segments of the semiconductor market across residential, municipal, commercial, and industrial applications and points out recent developments in setting standards for indoor air quality.

Keysight’s Catalin Tudor considers the current state of AI and whether it is possible to create machines capable of consciousness and that can experience subjective states like humans.

In a blog for SEMI, Resilinc’s Bindiya Vakil warns that it’s often low-cost parts that cause supply chain snarls and argues for a change in procurement mindset to look at even the most inexpensive parts and materials when they are critical to products or revenue to build a more resilient supply chain.

Plus, check out the blogs featured in the latest Low Power-High Performance newsletter:

Cadence’s Dharini SubashChandran and Manoj Kachadiya examine how flash’s varying degrees of speed, density, and performance cater to different application requirements.

Rambus’ Vinitha Seevaratnam traces the evolution of data rates in mobile-focused memory.

Fraunhofer IIS EAS’ Kay-Uwe Giering and Christian Skubich point to a new level of temporal precision.

Synopsys’ Vamsi Thatha shows how to predict metal fill effects while performing RC extraction.

Siemens’ Wilfried Wessel lays out the key factors that determine power module efficiency and performance.

Ansys’ David Dang digs into virtual validation, a technique that helps ensure electronics can withstand harsh in-vehicle environments.

Arm’s Neil Parris highlights the ability to experiment and access to technical support help as a way to overcome early challenges.

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