Week in Review: IoT, Security, Auto

By Jeff Dorsch - 19 Jul, 2019 - Comments: 0

Products/Services Arm rolled out its Flexible Access program, which offers system-on-a-chip design teams the capability to try out the company’s semiconductor intellectual property, along with IP from Arm partners, before they commit to licensing IP and to pay only for what they use in production. The new engagement model is expected to prove useful for Internet of Things design projects and... » read more

The Week in Review: IoT

By Jeff Dorsch - 22 Jun, 2018 - Comments: 0

Finance Marvell Technology Group priced $500 million in senior notes due in 2023 and $500 million in senior notes due in 2028. The chip company will use net proceeds from the debt offering, cash on hand, and borrowings under a new term loan facility to fund the cash consideration and other amounts payable for Marvell’s proposed $6 billion acquisition of Cavium. The companies have expected to... » read more

The Week In Review: IoT

By Jeff Dorsch - 13 Jan, 2017 - Comments: 0

R&D National Instruments this week opened the NI Industrial Internet of Things Lab at its headquarters in Austin, Texas. NI and Real-Time Innovations are co-leading the Industrial Internet Consortium’s Industrial Internet of Things Microgrid Testbed, which will be hosted at the NI Industrial Internet of Things Lab. The testbed uses the Data Distribution Service standard and is working to dev... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

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Week in Review: IoT, Security, Auto

The Week in Review: IoT

The Week In Review: IoT