The Week In Review: Design

By Jesse Allen - 14 Apr, 2017 - Comments: 0

M&A Synapse Design acquired Asilicon, a design services firm based in Ranchi Jharkhand, India. Through the acquisition, Synapse Design adds a second design center in India and gains an additional 80 engineers. "The focus of the Ranchi office will be to provide lower-cost offshore design center services for our customer's designs targeting 7- and 10-nm process technology," said Satish Bag... » read more

The Week In Review: Design

By Jesse Allen - 17 Mar, 2017 - Comments: 0

Business Andes Technology went public this week on the Taiwan Stock Exchange with an initial stock listing of 40,611,915 shares at a price of NT$65.10 (USD $2.12) per share. The shares began trading March 14, 2017, under the TWSE ticker symbol “6533.TWO.” Andes plans to use the proceeds to expand the company's R&D effort, to fuel international expansion into the U.S. and Europe and t... » read more

Power Impacting Cost Of Chips

By Brian Bailey - 15 Mar, 2017 - Comments: 0

The increase in complexity of the power delivery network (PDN) is starting to outpace increases in functional complexity, adding to the already escalating costs of modern chips. With no signs of slowdown, designers have to ensure that overdesign and margining do not eat up all of the profit margin. The semiconductor industry is used to problems becoming harder at smaller geometries, but unti... » read more

The Ultimate Shift Left

By Brian Bailey - 09 Mar, 2017 - Comments: 0

Floorplanning is becoming much more difficult due to a combination of factors—increased complexity of the power delivery network, lengthening of clock trees, rising levels of communication, and greater connectedness of [getkc id="81" kc_name="SoC"]s coupled with highly constrained routing resources. The goal of floorplanning is to determine optimal placement of blocks on a die. But connect... » read more

The Week In Review: Design

By Jesse Allen - 17 Feb, 2017 - Comments: 0

Tools Mentor Graphics launched the company's third generation data-center friendly emulation platform, Veloce Strato. The emulator has a capacity of 2.5BG when fully loaded, and total capacity can be increased by linking emulators. It has available slots for 64 Advanced Verification Boards (AVBs) and fully loaded consumes up to 50KW (22.7 W/Mgate) of power. Aldec uncorked the latest versi... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Silicon Creations

The Week In Review: Design

The Week In Review: Design

Power Impacting Cost Of Chips

The Ultimate Shift Left

The Week In Review: Design