Improving The Air-Stability and NBTI Reliability of BEOL CNFETs


A new technical paper titled "Overcoming Ambient Drift and Negative-Bias Temperature Instability in Foundry Carbon Nanotube Transistors" was published by researchers at MIT, Stanford University, Carnegie Mellon University and Analog Devices. Abstract: "Back-end-of-line (BEOL) logic integration is emerging as a complementary scaling path to supplement front-end-of-line (FEOL) Silicon. Among ... » read more

New Way To Transmit Light Signals Through A Chip (NIST)


A technical paper titled “Bound-state-in-continuum guided modes in a multilayer electro-optically active photonic integrated circuit platform” was published by researchers at the National Institute of Standards and Technology (NIST), University of Maryland, and Theiss Research. Abstract: "In many physical systems, the interaction with an open environment leads to energy dissipation and re... » read more

Silicon Photonics Manufacturing Ramps Up


Circuit scaling is starting to hit a wall as the laws of physics clash with exponential increases in the volume of data, forcing chipmakers to take a much closer look at silicon photonics as a way of moving data from where it is collected to where it is processed and stored. The laws of physics are immutable. Put simply, there are limits to how fast an electron can travel through copper. The... » read more

A Polymer-Free Technique For Assembling Van Der Waals Heterostructures Using Flexible Si Nitride Membranes


A technical paper titled “Clean assembly of van der Waals heterostructures using silicon nitride membranes” was published by researchers at University of Manchester, Imperial College London, National Institute for Materials Science (Japan), and University of Lancaster. Abstract Van der Waals heterostructures are fabricated by layer-by-layer assembly of individual two-dimensional mater... » read more

L-FinFET Neuron For A Highly Scalable Capacitive Neural Network (KAIST)


A new technical paper titled "An Artificial Neuron with a Leaky Fin-Shaped Field-Effect Transistor for a Highly Scalable Capacitive Neural Network" was published by researchers at KAIST (Korea Advanced Institute of Science and Technology). “In commercialized flash memory, tunnelling oxide prevents the trapped charges from escaping for better memory ability. In our proposed FinFET neuron, t... » read more

Selective etching of silicon nitride over silicon oxide using ClF3 /H2 remote plasma


Researchers from Sungkyunkwan University, MIT and others present an option for selective etching. Abstract "Precise and selective removal of silicon nitride (SiNx) over silicon oxide (SiOy) in a oxide/nitride stack is crucial for a current three dimensional NOT-AND type flash memory fabrication process. In this study, fast and selective isotropic etching of SiNx over SiOy has been investiga... » read more