Transforming Silicon Bring-Up


Not too long ago, the return of first silicon from the foundry was a nail-biting moment as power was applied to the chip. Today, better verification methodologies, increased use of emulation, and more mature fabrication practices have transformed how teams utilize first silicon. It is about to be transformed again, and there are some interesting possibilities on the horizon. Much of what use... » read more

Thoroughly Verifying Complex SoCs


The number of things that can go wrong in complex SoCs targeted at leading-edge applications is staggering, and there is no indication that verifying these chips will function as expected is going to get any easier. Heterogeneous designs developed for leading-edge applications, such as 5G, IoT, automotive and AI, are now complex systems in their own right. But they also need to work in conju... » read more

Week In Review: Design, Low Power


Synopsys completed its acquisition of QTronic GmbH, a provider of simulation, test tools, and services for automotive software and systems development. Terms of the deal were not disclosed. Synopsys launched the PrimeECO design closure solution, a signoff-driven solution that the company says achieves signoff closure with zero iterations. The tool includes a machine-learning-driven Hybrid Ti... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys debuted its new DesignWare ARC EV7x Embedded Vision Processor family for machine learning and AI edge applications. The ARC EV7x Vision Processors integrate up to four enhanced vector processing units (VPUs) and an optional Deep Neural Network (DNN) accelerator with up to 14,080 MACs to deliver up to 35 TOPS performance in 16nm FinFET process technologies under typical ... » read more

Week In Review: Design, Low Power


Tools & IP Arm has a new access and licensing model for its IP. Flexible Access allows SoC design teams to initiate projects before they license IP by paying a yearly fee for immediate access to a broad portfolio of technology, then paying a license fee only when they commit to manufacturing, followed by royalties for each unit shipped. IP available through Arm Flexible Access includes the... » read more

Week In Review: Design, Low Power


VESA published the DisplayPort 2.0 standard, which allows for a max payload of 77.37 Gbps, a 3X increase in data bandwidth performance compared to DisplayPort 1.4a. The latest release also includes capabilities to address beyond 8K resolutions, higher refresh rates and HDR support at higher resolutions, multiple display configurations, and support for 4K-and-beyond VR resolutions. It is backwar... » read more

How To Integrate An Embedded FPGA


Choosing to add programmable logic into an SoC with an eFPGA is just the beginning. Other choices follow involving how many lookup tables (LUTs), how much routing and what topology, how will data be transferred in and out of the fabric, does data need to be coherent with system memory, how will it be programmed and tested, and what RTL functions need to be embedded into the programmable fabric ... » read more

Week In Review: Design, Low Power


M&A Marvell will acquire Avera Semiconductor, the ASIC business of GlobalFoundries, for $650 million in cash at closing plus an additional $90 million in cash if certain business conditions are satisfied within the next 15 months. The agreements include transfer of Avera's revenue base, strategic design wins with infrastructure OEMs, and a new long-term wafer supply agreement between Globa... » read more

Week In Review: Design, Low Power


Tools & IP Cadence introduced the Tensilica Vision Q7 DSP, which provides up to 1.82 TOPS and is specifically optimized for simultaneous localization and mapping (SLAM). The DSP has a very long instruction word (VLIW) SIMD architecture, an enhanced instruction set supporting 8/16/32-bit data types and optional VFPU support for single and half precision, and a number of iDMA enhancements in... » read more

Week In Review: Design, Low Power


Tools & IP Engineering simulation company ANSYS says thanks to new features in its ANSYS Twin Builder, product developers may be able save money in warranty and operational costs. The Twin Builder creates a digital twin of a systems in the field, enabling a convenient way to monitor and maintain systems remotely. The latest release adds predictive maintenance features for digital-twin runt... » read more

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