tag: Teklatech

Dynamic Peak Power As A Proxy For DVD? Really?
By Tobias Bjerregaard - 08 Dec, 2016 - Comments: 0

Dynamic-voltage-drop (DVD) concerns have grown substantially at the 10nm and 7nm silicon process nodes. DVD refers to the transient voltage drop that a local power grid on a chip might experience if there is a rapid change in current. That drop can act like a “stall,” hurting performance until the grid recovers. Beefing up the power grid metal might seem to be the obvious fix, but, at th... » read more

The Time Dimension Of Power
By Brian Bailey - 10 Nov, 2016 - Comments: 0

Power is the flow of energy over time. While both aspects of that equation are important, they are important to different people in different ways. Energy that moves too quickly can cause significant damage. Too much energy moving over time can mean a non-competitive product, from battery-powered devices to a wide array of locations such as the datacenter. When the industry talks about power... » read more

Closing The Power Integrity Gap
By Ann Mutschler - 19 Oct, 2016 - Comments: 0

Voltage drop has always been a significant challenge. As far back as 130nm, specialist tools were being used to ensure that enough local decoupling capacitance (decap) cells were inserted in addition to larger decaps implemented around the SoC. But advanced nodes are complicating matters and further increasing complexity. These technological challenges, which underlie the power, performance ... » read more

Betting On Power And Deep Learning
By Ed Sperling - 13 Oct, 2016 - Comments: 0

Jim Hogan, managing partner of Vista Ventures, sat down with Semiconductor Engineering to talk about what investments deliver the biggest returns, how quickly, and why there are so few investors in some big growth areas. What follows are excerpts of that conversation. SE: What are you investing in these days and why? Hogan: I have about 15 active deals right now. I generally invest in thi... » read more

Getting The Power/Performance Ratio Right
By Ann Mutschler - 13 Oct, 2016 - Comments: 0

Getting to market quickly means determining as soon as possible if a concept for a new design will work or not, particularly where power and performance are concerned. Making this determination requires intimate knowledge of the scenarios in which the device will operate — and that is just the start. In order to set things up, you need to somehow model the system, which could be done in a ... » read more

Focus Shifts To Architectures
By Ed Sperling - 08 Sep, 2016 - Comments: 1

Chipmakers increasingly are relying on architectural and micro-architectural changes as the best hope for improving power and performance across a spectrum of markets, process nodes and price points. While discussion about the death of [getkc id="74" comment="Moore's Law"] predates the 1-micron process node, there is no question that it is getting harder for even the largest chipmakers to st... » read more

Hitting The Power Integrity Wall At 10nm
By Tobias Bjerregaard - 08 Sep, 2016 - Comments: 0

At 10nm and beyond, the breakdown of some historic trends tied to Moore's Law is making it harder to fully harvest the benefits of scaling semiconductor technologies. Underlying the power, performance and area benefits of scaling are technological challenges that must be solved in order to make the semiconductor products a profitable business. Power-related challenges are among the most pres... » read more

Optimization Challenges For 10nm And 7nm
By Brian Bailey - 06 Sep, 2016 - Comments: 0

Optimization used to be a simple timing against area tradeoff but not anymore. As we go to each new node, the tradeoffs become more complicated involving additional aspects of the design that used to be dealt with in isolation. Semiconductor Engineering sat down to discuss these issues with Krishna Balachandran, director of product management for low-power products at [getentity id="22032" e... » read more

Optimization Challenges For 10nm And 7nm
By Brian Bailey - 17 Aug, 2016 - Comments: 0

Optimization used to be a simple timing against area tradeoff but not anymore. As we go to each new node, the tradeoffs become more complicated involving additional aspects of the design that used to be dealt with in isolation. Semiconductor Engineering sat down to discuss these issues with Krishna Balachandran, director of product management for low power products at [getentity id="22032" ... » read more

New Architectures, Approaches To Speed Up Chips
By Ed Sperling - 15 Aug, 2016 - Comments: 2

The need for speed is back. An explosion in the amount of data that needs to be collected and processed is driving a new wave of change in hardware, software and overall system design. After years of emphasizing power reduction, performance has re-emerged as a top concern in a variety of applications such as smarter cars, wearable devices and cloud data centers. But how to get there has cha... » read more

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